@article {,
	title = {Sparse matrix-vector and matrix-multivector products for the truncated SVD on graphics processors},
	journal = {Concurrency and Computation: Practice and Experience},
	year = {2023},
	month = {2023-08},
	abstract = {Many practical algorithms for numerical rank computations implement an iterative procedure that involves repeated multiplications of a vector, or a collection of vectors, with both a sparse matrix A and its transpose. Unfortunately, the realization of these sparse products on current high performance libraries often deliver much lower arithmetic throughput when the matrix involved in the product is transposed. In this work, we propose a hybrid sparse matrix layout, named CSRC, that combines the flexibility of some well-known sparse formats to offer a number of appealing properties: (1) CSRC can be obtained at low cost from the popular CSR (compressed sparse row) format; (2) CSRC has similar storage requirements as CSR; and especially, (3) the implementation of the sparse product kernels delivers high performance for both the direct product and its transposed variant on modern graphics accelerators thanks to a significant reduction of atomic operations compared to a conventional implementation based on CSR. This solution thus renders considerably higher performance when integrated into an iterative algorithm for the truncated singular value decomposition (SVD), such as the randomized SVD or, as demonstrated in the experimental results, the block Golub{\textendash}Kahan{\textendash}Lanczos algorithm.},
	keywords = {graphics processing units, Singular value decomposition, sparse matrix-multivector product, sparse matrix-vector product},
	issn = {1532-0626},
	doi = {10.1002/cpe.7871},
	url = {https://onlinelibrary.wiley.com/doi/pdf/10.1002/cpe.7871},
	author = {Jos{\'e} I. Aliaga and Hartwig Anzt and Enrique S. Quintana-Orti and Andres E. Thomas}
}
@article {826,
	title = {Unveiling the Performance-energy Trade-off in Iterative Linear System Solvers for Multithreaded Processors},
	journal = {Concurrency and Computation: Practice and Experience},
	volume = {27},
	year = {2014},
	month = {2014-09},
	pages = {885-904},
	chapter = {885},
	abstract = {In this paper, we analyze the interactions occurring in the triangle performance-power-energy for the execution of a pivotal numerical algorithm, the iterative conjugate gradient (CG) method, on a diverse collection of parallel multithreaded architectures. This analysis is especially timely in a decade where the power wall has arisen as a major obstacle to build faster processors. Moreover, the CG method has recently been proposed as a complement to the LINPACK benchmark, as this iterative method is argued to be more archetypical of the performance of today{\textquoteright}s scientific and engineering applications. To gain insights about the benefits of hands-on optimizations we include runtime and energy efficiency results for both out-of-the-box usage relying exclusively on compiler optimizations, and implementations manually optimized for target architectures, that range from general-purpose and digital signal multicore processors to manycore graphics processing units, all representative of current multithreaded systems.},
	keywords = {CG, CPUs, energy efficiency, GPUs, low-power architectures},
	doi = {10.1002/cpe.3341},
	url = {http://dx.doi.org/10.1002/cpe.3341},
	author = {Jos{\'e} I. Aliaga and Hartwig Anzt and Maribel Castillo and Juan C. Fern{\'a}ndez and Germ{\'a}n Le{\'o}n and Joaqu{\'\i}n P{\'e}rez and Enrique S. Quintana-Orti}
}
