@booklet {,
	title = {CholeskyQR with Randomization and Pivoting for Tall Matrices (CQRRPT)},
	year = {2024},
	month = {2024-02},
	publisher = {arXiv},
	abstract = {This paper develops and analyzes a new algorithm for QR decomposition with column pivoting (QRCP) of rectangular matrices with large row counts. The algorithm combines methods from randomized numerical linear algebra in a particularly careful way in order to accelerate both pivot decisions for the input matrix and the process of decomposing the pivoted matrix into the QR form. The source of the latter acceleration is a use of randomized preconditioning and CholeskyQR. Comprehensive analysis is provided in both exact and finite-precision arithmetic to characterize the algorithm{\textquoteright}s rank-revealing properties and its numerical stability granted probabilistic assumptions of the sketching operator. An implementation of the proposed algorithm is described and made available inside the open-source RandLAPACK library, which itself relies on RandBLAS - also available in open-source format. Experiments with this implementation on an Intel Xeon Gold 6248R CPU demonstrate order-of-magnitude speedups relative to LAPACK{\textquoteright}s standard function for QRCP, and comparable performance to a specialized algorithm for unpivoted QR of tall matrices, which lacks the strong rank-revealing properties of the proposed method.},
	url = {https://arxiv.org/abs/2311.08316},
	author = {Maksim Melnichenko and Oleg Balabanov and Riley Murray and James Demmel and Michael W. Mahoney and Piotr Luszczek}
}
@article {,
	title = {Cache Optimization and Performance Modeling of Batched, Small, and Rectangular Matrix Multiplication on Intel, AMD, and Fujitsu Processors},
	journal = {ACM Transactions on Mathematical Software},
	volume = {49},
	year = {2023},
	month = {2023-09},
	pages = {1 - 29},
	abstract = {Factorization and multiplication of dense matrices and tensors are critical, yet extremely expensive pieces of the scientific toolbox. Careful use of low rank approximation can drastically reduce the computation and memory requirements of these operations. In addition to a lower arithmetic complexity, such methods can, by their structure, be designed to efficiently exploit modern hardware architectures. The majority of existing work relies on batched BLAS libraries to handle the computation of many small dense matrices. We show that through careful analysis of the cache utilization, register accumulation using SIMD registers and a redesign of the implementation, one can achieve significantly higher throughput for these types of batched low-rank matrices across a large range of block and batch sizes. We test our algorithm on three CPUs using diverse ISAs {\textendash} the Fujitsu A64FX using ARM SVE, the Intel Xeon 6148 using AVX-512, and AMD EPYC 7502 using AVX-2, and show that our new batching methodology is able to obtain more than twice the throughput of vendor optimized libraries for all CPU architectures and problem sizes.},
	issn = {0098-3500},
	doi = {10.1145/3595178},
	url = {https://dl.acm.org/doi/10.1145/3595178},
	author = {Deshmukh, Sameer and Yokota, Rio and Bosilca, George}
}
@article {,
	title = {Combining multitask and transfer learning with deep Gaussian processes for autotuning-based performance engineering},
	journal = {The International Journal of High Performance Computing Applications},
	year = {2023},
	month = {2023-03},
	abstract = {We combine deep Gaussian processes (DGPs) with multitask and transfer learning for the performance modeling and optimization of HPC applications. Deep Gaussian processes merge the uncertainty quantification advantage of Gaussian processes (GPs) with the predictive power of deep learning. Multitask and transfer learning allow for improved learning efficiency when several similar tasks are to be learned simultaneously and when previous learned models are sought to help in the learning of new tasks, respectively. A comparison with state-of-the-art autotuners shows the advantage of our approach on two application problems. In this article, we combine DGPs with multitask and transfer learning to allow for both an improved tuning of an application parameters on problems of interest but also the prediction of parameters on any potential problem the application might encounter.},
	issn = {1094-3420},
	doi = {10.1177/10943420231166365},
	url = {http://journals.sagepub.com/doi/10.1177/10943420231166365},
	author = {Luszczek, Piotr and Sid-Lakhdar, Wissam M and Dongarra, Jack}
}
@inproceedings {,
	title = {Checkpointing {\`a} la Young/Daly: An Overview},
	journal = {IC3-2022: Proceedings of the 2022 Fourteenth International Conference on Contemporary Computing},
	year = {2022},
	month = {2022-08},
	pages = {701-710},
	publisher = {ACM Press},
	address = {Noida, India},
	abstract = {The Young/Daly formula provides an approximation of the optimal checkpoint period for a parallel application executing on a supercomputing platform. The Young/Daly formula was originally designed for preemptible tightly-coupled applications. We provide some background and survey various application scenarios to assess the usefulness and limitations of the formula.},
	isbn = {9781450396752},
	doi = {10.1145/3549206},
	url = {https://dl.acm.org/doi/fullHtml/10.1145/3549206.3549328},
	author = {Anne Benoit and Yishu Du and Thomas Herault and Loris Marchal and Guillaume Pallez and Lucas Perotin and Yves Robert and Hongyang Sun and Frederic Vivien}
}
@techreport {,
	title = {Communication Avoiding LU with Tournament Pivoting in SLATE},
	journal = {SLATE Working Notes},
	number = {18, ICL-UT-22-01},
	year = {2022},
	month = {2022-01},
	author = {Rabab Alomairy and Mark Gates and Sebastien Cayrols and Dalal Sukkari and Kadir Akbudak and Asim YarKhan and Paul Bagwell and Jack Dongarra}
}
@article {,
	title = {Comparing Distributed Termination Detection Algorithms for Modern HPC Platforms},
	journal = {International Journal of Networking and Computing},
	volume = {12},
	year = {2022},
	month = {2022-01},
	pages = {26 - 46},
	abstract = {This paper revisits distributed termination detection algorithms in the context of High-Performance Computing (HPC) applications. We introduce an efficient variant of the Credit Distribution Algorithm (CDA) and compare it to the original algorithm (HCDA) as well as to its two primary competitors: the Four Counters algorithm (4C) and the Efficient Delay-Optimal Distributed algorithm (EDOD). We analyze the behavior of each algorithm for some simplified task-based kernels and show the superiority of CDA in terms of the number of control messages. We then compare the implementation of these algorithms over a task-based runtime system, PaRSEC and show the advantages and limitations of each approach in a real implementation.},
	issn = {2185-2839},
	doi = {10.15803/ijnc.12.1_26},
	url = {https://www.jstage.jst.go.jp/article/ijnc/12/1/12_26/_article},
	author = {George Bosilca and Bouteiller, Aur{\'e}lien and Herault, Thomas and Le F{\`e}vre, Valentin and Robert, Yves and Dongarra, Jack}
}
@conference {,
	title = {Composition of Algorithmic Building Blocks in Template Task Graphs},
	booktitle = {2022 IEEE/ACM Parallel Applications Workshop: Alternatives To MPI+X (PAW-ATM)},
	year = {2022},
	month = {2023-01},
	publisher = {IEEE},
	organization = {IEEE},
	address = {Dallas, TX, USA},
	doi = {10.1109/PAW-ATM56565.2022.00008},
	url = {https://ieeexplore.ieee.org/document/10024647/},
	author = {Herault, Thomas and Schuchart, Joseph and Valeev, Edward F. and George Bosilca}
}
@article {,
	title = {Compressed basis GMRES on high-performance graphics processing units},
	journal = {The International Journal of High Performance Computing Applications},
	year = {2022},
	month = {2022-05},
	abstract = {Krylov methods provide a fast and highly parallel numerical tool for the iterative solution of many large-scale sparse linear systems. To a large extent, the performance of practical realizations of these methods is constrained by the communication bandwidth in current computer architectures, motivating the investigation of sophisticated techniques to avoid, reduce, and/or hide the message-passing costs (in distributed platforms) and the memory accesses (in all architectures). This article leverages Ginkgo{\textquoteright}s memory accessor in order to integrate a communication-reduction strategy into the (Krylov) GMRES solver that decouples the storage format (i.e., the data representation in memory) of the orthogonal basis from the arithmetic precision that is employed during the operations with that basis. Given that the execution time of the GMRES solver is largely determined by the memory accesses, the cost of the datatype transforms can be mostly hidden, resulting in the acceleration of the iterative step via a decrease in the volume of bits being retrieved from memory. Together with the special properties of the orthonormal basis (whose elements are all bounded by 1), this paves the road toward the aggressive customization of the storage format, which includes some floating-point as well as fixed-point formats with mild impact on the convergence of the iterative process. We develop a high-performance implementation of the {\textquotedblleft}compressed basis GMRES{\textquotedblright} solver in the Ginkgo sparse linear algebra library using a large set of test problems from the SuiteSparse Matrix Collection. We demonstrate robustness and performance advantages on a modern NVIDIA V100 graphics processing unit (GPU) of up to 50\% over the standard GMRES solver that stores all data in IEEE double-precision.},
	issn = {1094-3420},
	doi = {10.1177/10943420221115140},
	url = {http://journals.sagepub.com/doi/10.1177/10943420221115140},
	author = {Aliaga, Jos{\'e} I and Anzt, Hartwig and Gr{\"u}tzmacher, Thomas and Quintana-Ort{\'\i}, Enrique S and Andres E. Thomas}
}
@article {,
	title = {Compression and load balancing for efficient sparse matrix-vector product on multicore processors and graphics processing units},
	journal = {Concurrency and Computation: Practice and Experience},
	volume = {34},
	year = {2022},
	month = {2022-06},
	issn = {1532-0626},
	doi = {10.1002/cpe.6515},
	url = {https://doi.org/10.1002/cpe.6515},
	author = {Aliaga, Jos{\'e} I. and Anzt, Hartwig and Gr{\"u}tzmacher, Thomas and Quintana-Orti, Enrique S. and Andres E. Thomas}
}
@article {,
	title = {Computational science for a better future},
	journal = {Journal of Computational Science},
	volume = {62},
	year = {2022},
	month = {2022-07},
	pages = {101745},
	issn = {18777503},
	doi = {10.1016/j.jocs.2022.101745},
	url = {https://www.sciencedirect.com/science/article/pii/S1877750322001351},
	author = {Kovalchuk, Sergey V. and Krzhizhanovskaya, Valeria V. and Paszy{\'n}ski, Maciej and Kranzlm{\"u}ller, Dieter and Dongarra, Jack and Sloot, Peter M.A.}
}
@article {,
	title = {Callback-based completion notification using MPI Continuations},
	journal = {Parallel Computing},
	volume = {21238566},
	year = {2021},
	month = {Jan-05-2021},
	pages = {102793},
	abstract = {Asynchronous programming models (APM) are gaining more and more traction, allowing applications to expose the available concurrency to a runtime system tasked with coordinating the execution. While MPI has long provided support for multi-threaded communication and nonblocking operations, it falls short of adequately supporting APMs as correctly and efficiently handling MPI communication in different models is still a challenge. We have previously proposed an extension to the MPI standard providing operation completion notifications using callbacks, so-called MPI Continuations. This interface is flexible enough to accommodate a wide range of different APMs.

In this paper, we present an extension to the previously described interface that allows for finer control of the behavior of the MPI Continuations interface. We then present some of our first experiences in using the interface in the context of different applications, including the NAS parallel benchmarks, the PaRSEC task-based runtime system, and a load-balancing scheme within an adaptive mesh refinement solver called ExaHyPE. We show that the interface, implemented inside Open MPI, enables low-latency, high-throughput completion notifications that outperform solutions implemented in the application space.},
	keywords = {MPI, MPI Continuations, OmpSs, OpenMP, parsec, TAMPI, Task-based programming models},
	issn = {01678191},
	doi = {10.1016/j.parco.2021.102793},
	url = {https://www.sciencedirect.com/science/article/abs/pii/S0167819121000466?via\%3Dihub},
	author = {Schuchart, Joseph and Samfass, Philipp and Niethammer, Christoph and Gracia, Jos{\'e} and George Bosilca}
}
@techreport {,
	title = {CEED ECP Milestone Report: Improve Performance and Capabilities of CEED-Enabled ECP Applications on Summit/Sierra},
	journal = {ECP Milestone Reports},
	year = {2020},
	month = {2020-05},
	publisher = {Zenodo},
	doi = {https://doi.org/10.5281/zenodo.3860804},
	url = {https://doi.org/10.5281/zenodo.3860804},
	author = {Kolev, Tzanio and Fischer, Paul and Abdelfattah, Ahmad and Ananthan, Shreyas and Valeria Barra and Natalie Beams and Bleile, Ryan and Brown, Jed and Carson, Robert and Camier, Jean-Sylvain and Churchfield, Matthew and Dobrev, Veselin and Jack Dongarra and Dudouit, Yohann and Karakus, Ali and Kerkemeier, Stefan and Lan, YuHsiang and Medina, David and Merzari, Elia and Min, Misun and Parker, Scott and Ratnayaka, Thilina and Smith, Cameron and Sprague, Michael and Stitt, Thomas and Thompson, Jeremy and Tomboulides, Ananias and Stanimire Tomov and Tomov, Vladimir and Vargas, Arturo and Warburton, Tim and Weiss, Kenneth}
}
@article {,
	title = {Clover: Computational Libraries Optimized via Exascale Research},
	year = {2020},
	month = {2020-02},
	publisher = {2020 Exascale Computing Project Annual Meeting},
	address = {Houston, TX},
	author = {Mark Gates and Stanimire Tomov and Hartwig Anzt and Piotr Luszczek and Jack Dongarra}
}
@conference {1478,
	title = {Communication Avoiding 2D Stencil Implementations over PaRSEC Task-Based Runtime},
	booktitle = {2020 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)},
	year = {2020},
	month = {2020-05},
	publisher = {IEEE},
	organization = {IEEE},
	address = {New Orleans, LA},
	abstract = {Stencil computation or general sparse matrix-vector product (SpMV) are key components in many algorithms like geometric multigrid or Krylov solvers. But their low arithmetic intensity means that memory bandwidth and network latency will be the performance limiting factors. The current architectural trend favors computations over bandwidth, worsening the already unfavorable imbalance. Previous work approached stencil kernel optimization either by improving memory bandwidth usage or by providing a Communication Avoiding (CA) scheme to minimize network latency in repeated sparse vector multiplication by replicating remote work in order to delay communications on the critical path. Focusing on minimizing communication bottleneck in distributed stencil computation, in this study we combine a CA scheme with the computation and communication overlapping that is inherent in a dataflow task-based runtime system such as PaRSEC to demonstrate their combined benefits. We implemented the 2D five point stencil (Jacobi iteration) in PETSc, and over PaRSEC in two flavors, full communications (base-PaRSEC) and CA-PaRSEC which operate directly on a 2D compute grid. Our results running on two clusters, NaCL and Stampede2 indicate that we can achieve 2{\texttimes} speedup over the standard SpMV solution implemented in PETSc, and in certain cases when kernel execution is not dominating the execution time, the CA-PaRSEC version achieved up to 57\% and 33\% speedup over base-PaRSEC implementation on NaCL and Stampede2 respectively.},
	doi = {https://doi.org/10.1109/IPDPSW50202.2020.00127},
	author = {Yu Pei and Qinglei Cao and George Bosilca and Piotr Luszczek and Victor Eijkhout and Jack Dongarra}
}
@book {,
	title = {Computational Science {\textendash} ICCS 2020: 20th International Conference, Amsterdam, The Netherlands, June 3{\textendash}5, 2020, Proceedings, Part VII},
	series = {Lecture Notes in Computer Science},
	number = {12143},
	year = {2020},
	month = {2020-06},
	pages = {775},
	publisher = {Springer International Publishing},
	organization = {Springer International Publishing},
	edition = {1},
	isbn = {978-3-030-50436-6},
	doi = {https://doi.org/10.1007/978-3-030-50436-6},
	author = {Valeria Krzhizhanovskaya and G{\'a}bor Z{\'a}vodszky and Michael Lees and Jack Dongarra and Peter Sloot and S{\'e}rgio Brissos and Jo{\~a}o Teixeira}
}
@book {,
	title = {Computational Science {\textendash} ICCS 2020: 20th International Conference, Amsterdam, The Netherlands, June 3{\textendash}5, 2020, Proceedings, Part IV},
	series = {Lecture Notes in Computer Science},
	number = {12140},
	year = {2020},
	month = {2020-06},
	pages = {668},
	publisher = {Springer International Publishing},
	organization = {Springer International Publishing},
	edition = {1},
	isbn = {978-3-030-50423-6},
	doi = {https://doi.org/10.1007/978-3-030-50423-6},
	author = {Valeria Krzhizhanovskaya and G{\'a}bor Z{\'a}vodszky and Michael Lees and Jack Dongarra and Peter Sloot and S{\'e}rgio Brissos and Jo{\~a}o Teixeira}
}
@book {,
	title = {Computational Science {\textendash} ICCS 2020: 20th International Conference, Amsterdam, The Netherlands, June 3{\textendash}5, 2020, Proceedings, Part I},
	series = {Lecture Notes in Computer Science},
	number = {12137},
	year = {2020},
	month = {2020-06},
	pages = {707},
	publisher = {Springer International Publishing},
	organization = {Springer International Publishing},
	edition = {1},
	isbn = {978-3-030-50371-0},
	doi = {https://doi.org/10.1007/978-3-030-50371-0},
	author = {Valeria Krzhizhanovskaya and G{\'a}bor Z{\'a}vodszky and Michael Lees and Jack Dongarra and Peter Sloot and S{\'e}rgio Brissos and Jo{\~a}o Teixeira}
}
@book {,
	title = {Computational Science {\textendash} ICCS 2020: 20th International Conference, Amsterdam, The Netherlands, June 3{\textendash}5, 2020, Proceedings, Part V},
	series = {Lecture Notes in Computer Science},
	number = {12141},
	year = {2020},
	month = {2020-06},
	pages = {618},
	publisher = {Springer International Publishing},
	organization = {Springer International Publishing},
	edition = {1},
	isbn = {978-3-030-50426-7},
	doi = {https://doi.org/10.1007/978-3-030-50426-7},
	author = {Valeria Krzhizhanovskaya and G{\'a}bor Z{\'a}vodszky and Michael Lees and Jack Dongarra and Peter Sloot and S{\'e}rgio Brissos and Jo{\~a}o Teixeira}
}
@book {,
	title = {Computational Science {\textendash} ICCS 2020: 20th International Conference, Amsterdam, The Netherlands, June 3{\textendash}5, 2020, Proceedings, Part II},
	series = {Lecture Notes in Computer Science},
	number = {12138},
	year = {2020},
	month = {2020-06},
	pages = {697},
	publisher = {Springer International Publishing},
	organization = {Springer International Publishing},
	edition = {1},
	isbn = {978-3-030-50417-5},
	doi = {https://doi.org/10.1007/978-3-030-50417-5},
	author = {Valeria Krzhizhanovskaya and G{\'a}bor Z{\'a}vodszky and Michael Lees and Jack Dongarra and Peter Sloot and S{\'e}rgio Brissos and Jo{\~a}o Teixeira}
}
@book {,
	title = {Computational Science {\textendash} ICCS 2020: 20th International Conference, Amsterdam, The Netherlands, June 3{\textendash}5, 2020, Proceedings, Part VI},
	series = {Lecture Notes in Computer Science},
	number = {12142},
	year = {2020},
	month = {2020-06},
	pages = {667},
	publisher = {Springer International Publishing},
	organization = {Springer International Publishing},
	edition = {1},
	isbn = {978-3-030-50433-5},
	doi = {https://doi.org/10.1007/978-3-030-50433-5},
	author = {Valeria Krzhizhanovskaya and G{\'a}bor Z{\'a}vodszky and Michael Lees and Jack Dongarra and Peter Sloot and S{\'e}rgio Brissos and Jo{\~a}o Teixeira}
}
@book {,
	title = {Computational Science {\textendash} ICCS 2020: 20th International Conference, Amsterdam, The Netherlands, June 3{\textendash}5, 2020, Proceedings, Part III},
	series = {Lecture Notes in Computer Science},
	number = {12139},
	year = {2020},
	month = {2020-06},
	pages = {648},
	publisher = {Springer International Publishing},
	organization = {Springer International Publishing},
	edition = {1},
	isbn = {978-3-030-50420-5},
	doi = {https://doi.org/10.1007/978-3-030-50420-5},
	author = {Valeria Krzhizhanovskaya and G{\'a}bor Z{\'a}vodszky and Michael Lees and Jack Dongarra and Peter Sloot and S{\'e}rgio Brissos and Jo{\~a}o Teixeira}
}
@techreport {1433,
	title = {CEED ECP Milestone Report: Performance Tuning of CEED Software and 1st and 2nd Wave Apps},
	year = {2019},
	month = {2019-10},
	publisher = {Zenodo},
	doi = {https://doi.org/10.5281/zenodo.3477618},
	author = {Stanimire Tomov and Ahmad Abdelfattah and Valeria Barra and Natalie Beams and Jed Brown and Jean-Sylvain Camier and Veselin Dobrev and Jack Dongarra and Yohann Dudouit and Paul Fischer and Ali Karakus and Stefan Kerkemeier and Tzanio Kolev and YuHsiang Lan and Elia Merzari and Misun Min and Aleks Obabko and Scott Parker and Thilina Ratnayaka and Jeremy Thompson and Ananias Tomboulides and Vladimir Tomov and Tim Warburton}
}
@techreport {1434,
	title = {CEED ECP Milestone Report: Public release of CEED 2.0},
	year = {2019},
	month = {2019-04},
	publisher = {Zenodo},
	doi = {10.5281/zenodo.2641316},
	url = {https://doi.org/10.5281/zenodo.2641316},
	author = {Jed Brown and Ahmad Abdelfattah and Valeria Barra and Veselin Dobrev and Yohann Dudouit and Paul Fischer and Tzanio Kolev and David Medina and Misun Min and Thilina Ratnayaka and Cameron Smith and Jeremy Thompson and Stanimire Tomov and Vladimir Tomov and Tim Warburton}
}
@conference {1449,
	title = {Characterization of Power Usage and Performance in Data-Intensive Applications using MapReduce over MPI},
	booktitle = {2019 International Conference on Parallel Computing (ParCo2019)},
	year = {2019},
	month = {2019-09},
	address = {Prague, Czech Republic},
	author = {Joshua Davis and Tao Gao and Sunita Chandrasekaran and Heike Jagode and Anthony Danalis and Pavan Balaji and Jack Dongarra and Michela Taufer}
}
@article {1305,
	title = {Checkpointing Strategies for Shared High-Performance Computing Platforms},
	journal = {International Journal of Networking and Computing},
	volume = {9},
	number = {1},
	year = {2019},
	pages = {28{\textendash}52},
	abstract = {Input/output (I/O) from various sources often contend for scarcely available bandwidth. For example, checkpoint/restart (CR) protocols can help to ensure application progress in failure-prone environments. However, CR I/O alongside an application{\textquoteright}s normal, requisite I/O can increase I/O contention and might negatively impact performance. In this work, we consider different aspects (system-level scheduling policies and hardware) that optimize the overall performance of concurrently executing CR-based applications that share I/O resources. We provide a theoretical model and derive a set of necessary constraints to minimize the global waste on a given platform. Our results demonstrate that Young/Daly{\textquoteright}s optimal checkpoint interval, despite providing a sensible metric for a single, undisturbed application, is not sufficient to optimally address resource contention at scale. We show that by combining optimal checkpointing periods with contention-aware system-level I/O scheduling strategies, we can significantly improve overall application performance and maximize the platform throughput. Finally, we evaluate how specialized hardware, namely burst buffers, may help to mitigate the I/O contention problem. Overall, these results provide critical analysis and direct guidance on how to design efficient, CR ready, large -scale platforms without a large investment in the I/O subsystem.},
	issn = {2185-2847},
	url = {http://www.ijnc.org/index.php/ijnc/article/view/195},
	author = {Thomas Herault and Yves Robert and Aurelien Bouteiller and Dorian Arnold and Kurt Ferreira and George Bosilca and Jack Dongarra}
}
@techreport {1398,
	title = {A Collection of Presentations from the BDEC2 Workshop in Kobe, Japan},
	journal = {Innovative Computing Laboratory Technical Report},
	number = {ICL-UT-19-09},
	year = {2019},
	month = {2019-02},
	publisher = {University of Tennessee, Knoxville},
	author = {Rosa M. Badia and Micah Beck and Fran{\c c}ois Bodin and Taisuke Boku and Franck Cappello and Alok Choudhary and Carlos Costa and Ewa Deelman and Nicola Ferrier and Katsuki Fujisawa and Kohei Fujita and Maria Girone and Geoffrey Fox and Shantenu Jha and Yoshinari Kameda and Christian Kniep and William Kramer and James Lin and Kengo Nakajima and Yiwei Qiu and Kishore Ramachandran and Glenn Ricart and Kim Serradell and Dan Stanzione and Lin Gan and Martin Swany and Christine Sweeney and Alex Szalay and Christine Kirkpatrick and Kenton McHenry and Alainna White and Steve Tuecke and Ian Foster and Joe Mambretti and William. M Tang and Michela Taufer and Miguel V{\'a}zquez}
}
@techreport {1399,
	title = {A Collection of White Papers from the BDEC2 Workshop in Poznan, Poland},
	journal = {Innovative Computing Laboratory Technical Report},
	number = {ICL-UT-19-10},
	year = {2019},
	month = {2019-05},
	publisher = {University of Tennessee, Knoxville},
	author = {Gabriel Antoniu and Alexandru Costan and Ovidiu Marcu and Maria S. P{\'e}rez and Nenad Stojanovic and Rosa M. Badia and Miguel V{\'a}zquez and Sergi Girona and Micah Beck and Terry Moore and Piotr Luszczek and Ezra Kissel and Martin Swany and Geoffrey Fox and Vibhatha Abeykoon and Selahattin Akkas and Kannan Govindarajan and Gurhan Gunduz and Supun Kamburugamuve and Niranda Perera and Ahmet Uyar and Pulasthi Wickramasinghe and Chathura Widanage and Maria Girone and Toshihiro Hanawa and Richard Moreno and Ariel Oleksiak and Martin Swany and Ryousei Takano and M.P. van Haarlem and J. van Leeuwen and J.B.R. Oonk and T. Shimwell and L.V.E. Koopmans}
}
@techreport {1408,
	title = {A Collection of White Papers from the BDEC2 Workshop in San Diego, CA},
	journal = {Innovative Computing Laboratory Technical Report},
	number = {ICL-UT-19-13},
	year = {2019},
	month = {2019-10},
	publisher = {University of Tennessee},
	author = {Ilkay Altintas and Kyle Marcus and Volkan Vural and Shweta Purawat and Daniel Crawl and Gabriel Antoniu and Alexandru Costan and Ovidiu Marcu and Prasanna Balaprakash and Rongqiang Cao and Yangang Wang and Franck Cappello and Robert Underwood and Sheng Di and Justin M. Wozniak and Jon C. Calhoun and Cong Xu and Antonio Lain and Paolo Faraboschi and Nic Dube and Dejan Milojicic and Balazs Gerofi and Maria Girone and Viktor Khristenko and Tony Hey and Erza Kissel and Yu Liu and Richard Loft and Pekka Manninen and Sebastian von Alfthan and Takemasa Miyoshi and Bruno Raffin and Olivier Richard and Denis Trystram and Maryam Rahnemoonfar and Robin Murphy and Joel Saltz and Kentaro Sano and Rupak Roy and Kento Sato and Jian Guo and Jen s Domke and Weikuan Yu and Takaki Hatsui and Yasumasa Joti and Alex Szalay and William M. Tang and Michael R. Wyatt II and Michela Taufer and Todd Gamblin and Stephen Herbein and Adam Moody and Dong H. Ahn and Rich Wolski and Chandra Krintz and Fatih Bakir and Wei-tsung Lin and Gareth George}
}
@article {1312,
	title = {Combining Checkpointing and Replication for Reliable Execution of Linear Workflows with Fail-Stop and Silent Errors},
	journal = {International Journal of Networking and Computing},
	volume = {9},
	number = {1},
	year = {2019},
	month = {2019},
	pages = {2-27},
	abstract = {Large-scale platforms currently experience errors from two di?erent sources, namely fail-stop errors (which interrupt the execution) and silent errors (which strike unnoticed and corrupt data). This work combines checkpointing and replication for the reliable execution of linear work?ows on platforms subject to these two error types. While checkpointing and replication have been studied separately, their combination has not yet been investigated despite its promising potential to minimize the execution time of linear work?ows in error-prone environments. Moreover, combined checkpointing and replication has not yet been studied in the presence of both fail-stop and silent errors. The combination raises new problems: for each task, we have to decide whether to checkpoint and/or replicate it to ensure its reliable execution. We provide an optimal dynamic programming algorithm of quadratic complexity to solve both problems. This dynamic programming algorithm has been validated through extensive simulations that reveal the conditions in which checkpointing only, replication only, or the combination of both techniques, lead to improved performance.},
	keywords = {checkpoint, fail-stop error; silent error, HPC, linear workflow, Replication},
	issn = {2185-2847},
	url = {http://www.ijnc.org/index.php/ijnc/article/view/194},
	author = {Anne Benoit and Aurelien Cavelan and Florina M. Ciorba and Valentin Le F{\`e}vre and Yves Robert}
}
@article {1301,
	title = {Comparing the Performance of Rigid, Moldable, and Grid-Shaped Applications on Failure-Prone HPC Platforms},
	journal = {Parallel Computing},
	volume = {85},
	year = {2019},
	month = {2019-07},
	pages = {1{\textendash}12},
	doi = {https://doi.org/10.1016/j.parco.2019.02.002},
	author = {Valentin Le F{\`e}vre and Thomas Herault and Yves Robert and Aurelien Bouteiller and Atsushi Hori and George Bosilca and Jack Dongarra}
}
@article {1238,
	title = {Computing Dense Tensor Decompositions with Optimal Dimension Trees},
	journal = {Algorithmica},
	volume = {81},
	year = {2019},
	month = {2019-05},
	pages = {2092{\textendash}2121},
	keywords = {CP decomposition, Dimension tree, Tensor computations, Tucker decomposition},
	issn = {1432-0541},
	doi = {https://doi.org/10.1007/s00453-018-0525-3},
	author = {Oguz Kaya and Yves Robert}
}
@article {1313,
	title = {Co-Scheduling HPC Workloads on Cache-Partitioned CMP Platforms},
	journal = {International Journal of High Performance Computing Applications},
	volume = {33},
	year = {2019},
	month = {2019-11},
	pages = {1221-1239},
	abstract = {With the recent advent of many-core architectures such as chip multiprocessors (CMPs), the number of processing units accessing a global shared memory is constantly increasing. Co-scheduling techniques are used to improve application throughput on such architectures, but sharing resources often generates critical interferences. In this article, we focus on the interferences in the last level of cache (LLC) and use the Cache Allocation Technology (CAT) recently provided by Intel to partition the LLC and give each co-scheduled application their own cache area. We consider m iterative HPC applications running concurrently and answer to the following questions: (i) How to precisely model the behavior of these applications on the cache-partitioned platform? and (ii) how many cores and cache fractions should be assigned to each application to maximize the platform efficiency? Here, platform efficiency is defined as maximizing the performance either globally, or as guaranteeing a fixed ratio of iterations per second for each application. Through extensive experiments using CAT, we demonstrate the impact of cache partitioning when multiple HPC applications are co-scheduled onto CMP platforms.},
	keywords = {cache partitioning, chip multiprocessor, co-scheduling, HPC application},
	doi = {https://doi.org/10.1177/1094342019846956},
	author = {Guillaume Aupy and Anne Benoit and Brice Goglin and Lo{\"\i}c Pottier and Yves Robert}
}
@conference {1379,
	title = {Counter Inspection Toolkit: Making Sense out of Hardware Performance Events},
	booktitle = {11th International Workshop on Parallel Tools for High Performance Computing},
	year = {2019},
	month = {2019-02},
	publisher = {Cham, Switzerland: Springer},
	organization = {Cham, Switzerland: Springer},
	address = {Dresden, Germany},
	abstract = {Hardware counters play an essential role in understanding the behavior of performance-critical applications, and inform any effort to identify opportunities for performance optimization. However, because modern hardware is becoming increasingly complex, the number of counters that are offered by the vendors increases and, in some cases, so does their complexity. In this paper we present a toolkit that aims to assist application developers invested in performance analysis by automatically categorizing and disambiguating performance counters. We present and discuss the set of microbenchmarks and analyses that we developed as part of our toolkit. We explain why they work and discuss the non-obvious reasons why some of our early benchmarks and analyses did not work in an effort to share with the rest of the community the wisdom we acquired from negative results.},
	doi = {https://doi.org/10.1007/978-3-030-11987-4_2},
	author = {Anthony Danalis and Heike Jagode and H Hanumantharayappa and Sangamesh Ragate and Jack Dongarra}
}
@article {1369,
	title = {A Customized Precision Format Based on Mantissa Segmentation for Accelerating Sparse Linear Algebra},
	journal = {Concurrency and Computation: Practice and Experience},
	volume = {40319},
	year = {2019},
	month = {2019-01},
	issn = {1532-0626},
	doi = {https://doi.org/10.1002/cpe.5418},
	author = {Thomas Gruetzmacher and Terry Cojean and Goran Flegar and Fritz G{\"o}bel and Hartwig Anzt}
}
@article {1187,
	title = {Checkpointing Workflows for Fail-Stop Errors},
	journal = {IEEE Transactions on Computers},
	volume = {67},
	year = {2018},
	month = {2018-08},
	pages = {1105{\textendash}1120},
	abstract = {We consider the problem of orchestrating the execution of workflow applications structured as Directed Acyclic Graphs (DAGs) on parallel computing platforms that are subject to fail-stop failures. The objective is to minimize expected overall execution time, or makespan. A solution to this problem consists of a schedule of the workflow tasks on the available processors and of a decision of which application data to checkpoint to stable storage, so as to mitigate the impact of processor failures. To address this challenge, we consider a restricted class of graphs, Minimal Series-Parallel Graphs (M-SPGS), which is relevant to many real-world workflow applications. For this class of graphs, we propose a recursive list-scheduling algorithm that exploits the M-SPG structure to assign sub-graphs to individual processors, and uses dynamic programming to decide how to checkpoint these sub-graphs. We assess the performance of our algorithm for production workflow configurations, comparing it to an approach in which all application data is checkpointed and an approach in which no application data is checkpointed. Results demonstrate that our algorithm outperforms both the former approach, because of lower checkpointing overhead, and the latter approach, because of better resilience to failures.},
	keywords = {checkpoint, fail-stop error, resilience, workflow},
	url = {http://ieeexplore.ieee.org/document/8279499/},
	author = {Li Han and Louis-Claude Canon and Henri Casanova and Yves Robert and Frederic Vivien}
}
@techreport {1397,
	title = {A Collection of White Papers from the BDEC2 Workshop in Bloomington, IN},
	journal = {Innovative Computing Laboratory Technical Report},
	number = {ICL-UT-18-15},
	year = {2018},
	month = {2018-11},
	publisher = {University of Tennessee, Knoxville},
	author = {James Ahrens and Christopher M. Biwer and Alexandru Costan and Gabriel Antoniu and Maria S. P{\'e}rez and Nenad Stojanovic and Rosa Badia and Oliver Beckstein and Geoffrey Fox and Shantenu Jha and Micah Beck and Terry Moore and Sunita Chandrasekaran and Carlos Costa and Thierry Deutsch and Luigi Genovese and Tarek El-Ghazawi and Ian Foster and Dennis Gannon and Toshihiro Hanawa and Tevfik Kosar and William Kramer and Madhav V. Marathe and Christopher L. Barrett and Takemasa Miyoshi and Alex Pothen and Ariful Azad and Judy Qiu and Bo Peng and Ravi Teja and Sahil Tyagi and Chathura Widanage and Jon Koskey and Maryam Rahnemoonfar and Umakishore Ramachandran and Miles Deegan and William Tang and Osamu Tatebe and Michela Taufer and Michel Cuende and Ewa Deelman and Trilce Estrada and Rafael Ferreira Da Silva and Harrel Weinstein and Rodrigo Vargas and Miwako Tsuji and Kevin G. Yager and Wanling Gao and Jianfeng Zhan and Lei Wang and Chunjie Luo and Daoyi Zheng and Xu Wen and Rui Ren and Chen Zheng and Xiwen He and Hainan Ye and Haoning Tang and Zheng Cao and Shujie Zhang and Jiahui Dai}
}
@article {1263,
	title = {Computational Benefit of GPU Optimization for Atmospheric Chemistry Modeling},
	journal = {Journal of Advances in Modeling Earth Systems},
	volume = {10},
	year = {2018},
	month = {2018-08},
	pages = {1952{\textendash}1969},
	abstract = {Global chemistry-climate models are computationally burdened as the chemical mechanisms become more complex and realistic. Optimization for graphics processing units (GPU) may make longer global simulation with regional detail possible, but limited study has been done to explore the potential benefit for the atmospheric chemistry modeling. Hence, in this study, the second-order Rosenbrock solver of the chemistry module of CAM4-Chem is ported to the GPU to gauge potential speed-up. We find that on the CPU, the fastest performance is achieved using the Intel compiler with a block interleaved memory layout. Different combinations of compiler and memory layout lead to ~11.02{\texttimes} difference in the computational time. In contrast, the GPU version performs the best when using a combination of fully interleaved memory layout with block size equal to the warp size, CUDA streams for independent kernels, and constant memory. Moreover, the most efficient data transfer between CPU and GPU is gained by allocating the memory contiguously during the data initialization on the GPU. Compared to one CPU core, the speed-up of using one GPU alone reaches a factor of ~11.7{\texttimes} for the computation alone and ~3.82{\texttimes} when the data transfer between CPU and GPU is considered. Using one GPU alone is also generally faster than the multithreaded implementation for 16 CPU cores in a compute node and the single-source solution (OpenACC). The best performance is achieved by the implementation of the hybrid CPU/GPU version, but rescheduling the workload among the CPU cores is required before the practical CAM4-Chem simulation.},
	keywords = {compiler, CUDA, data transfer, gpu, hybrid, memory layout},
	doi = {https://doi.org/10.1029/2018MS001276},
	author = {Jian Sun and Joshua Fu and John Drake and Qingzhao Zhu and Azzam Haidar and Mark Gates and Stanimire Tomov and Jack Dongarra}
}
@article {1193,
	title = {Computing the Expected Makespan of Task Graphs in the Presence of Silent Errors},
	journal = {Parallel Computing},
	volume = {75},
	year = {2018},
	month = {2018-07},
	pages = {41{\textendash}60},
	abstract = {Applications structured as Directed Acyclic Graphs (DAGs) of tasks occur in many domains, including popular scientific workflows. DAG scheduling has thus received an enormous amount of attention. Many of the popular DAG scheduling heuristics make scheduling deci- sions based on path lengths. At large scale compute platforms are subject to various types of failures with non-negligible probabilities of occurrence. Failures that have recently re- ceived increased attention are {\textquotedblleft}silent errors,{\textquotedblright} which cause data corruption. Tolerating silent errors is done by checking the validity of computed results and possibly re-executing a task from scratch. The execution time of a task then becomes a random variable, and so do path lengths in a DAG. Unfortunately, computing the expected makespan of a DAG (and equivalently computing expected path lengths in a DAG) is a computationally dif- ficult problem. Consequently, designing effective scheduling heuristics in this context is challenging. In this work, we propose an algorithm that computes a first order approxi- mation of the expected makespan of a DAG when tasks are subject to silent errors. We find that our proposed approximation outperforms previously proposed approaches both in terms of approximation error and of speed.},
	keywords = {Expected makespan, fault-tolerance, scheduling, Scientific workflows, silent errors, Task graphs},
	doi = {https://doi.org/10.1016/j.parco.2018.03.004},
	author = {Henri Casanova and Julien Herrmann and Yves Robert}
}
@article {1218,
	title = {Coping with Silent and Fail-Stop Errors at Scale by Combining Replication and Checkpointing},
	journal = {Journal of Parallel and Distributed Computing},
	volume = {122},
	year = {2018},
	month = {2018-12},
	pages = {209{\textendash}225},
	abstract = {This paper provides a model and an analytical study of replication as a technique to cope with silent errors, as well as a mixture of both silent and fail-stop errors on large-scale platforms. Compared with fail-stop errors that are immediately detected when they occur, silent errors require a detection mechanism. To detect silent errors, many application-specific techniques are available, either based on algorithms (e.g., ABFT), invariant preservation or data analytics, but replication remains the most transparent and least intrusive technique. We explore the right level (duplication, triplication or more) of replication for two frameworks: (i) when the platform is subject to only silent errors, and (ii) when the platform is subject to both silent and fail-stop errors. A higher level of replication is more expensive in terms of resource usage but enables to tolerate more errors and to even correct some errors, hence there is a trade-off to be found. Replication is combined with checkpointing and comes with two flavors: process replication and group replication. Process replication applies to message-passing applications with communicating processes. Each process is replicated, and the platform is composed of process pairs, or triplets. Group replication applies to black-box applications, whose parallel execution is replicated several times. The platform is partitioned into two halves (or three thirds). In both scenarios, results are compared before each checkpoint, which is taken only when both results (duplication) or two out of three results (triplication) coincide. Otherwise, one or more silent errors have been detected, and the application rolls back to the last checkpoint, as well as when fail-stop errors have struck. We provide a detailed analytical study for all of these scenarios, with formulas to decide, for each scenario, the optimal parameters as a function of the error rate, checkpoint cost, and platform size. We also report a set of extensive simulation results that nicely corroborates the analytical model.},
	keywords = {checkpointing, fail-stop errors, Fault tolerance, High-performance computing, Replication, silent errors},
	doi = {https://doi.org/10.1016/j.jpdc.2018.08.002},
	author = {Anne Benoit and Aurelien Cavelan and Franck Cappello and Padma Raghavan and Yves Robert and Hongyang Sun}
}
@article {1198,
	title = {Co-Scheduling Amdhal Applications on Cache-Partitioned Systems},
	journal = {International Journal of High Performance Computing Applications},
	volume = {32},
	year = {2018},
	month = {2018-01},
	pages = {123{\textendash}138},
	abstract = {Cache-partitioned architectures allow subsections of the shared last-level cache (LLC) to be exclusively reserved for some applications. This technique dramatically limits interactions between applications that are concurrently executing on a multicore machine. Consider n applications that execute concurrently, with the objective to minimize the makespan, defined as the maximum completion time of the n applications. Key scheduling questions are as follows: (i) which proportion of cache and (ii) how many processors should be given to each application? In this article, we provide answers to (i) and (ii) for Amdahl applications. Even though the problem is shown to be NP-complete, we give key elements to determine the subset of applications that should share the LLC (while remaining ones only use their smaller private cache). Building upon these results, we design efficient heuristics for Amdahl applications. Extensive simulations demonstrate the usefulness of co-scheduling when our efficient cache partitioning strategies are deployed.},
	keywords = {cache partitioning, co-scheduling, complexity results},
	doi = {https://doi.org/10.1177/1094342017710806},
	author = {Guillaume Aupy and Anne Benoit and Sicheng Dai and Lo{\"\i}c Pottier and Padma Raghavan and Yves Robert and Manu Shantharam}
}
@conference {1217,
	title = {Co-Scheduling HPC Workloads on Cache-Partitioned CMP Platforms},
	booktitle = {Cluster 2018},
	year = {2018},
	month = {2018-09},
	publisher = {IEEE Computer Society Press},
	organization = {IEEE Computer Society Press},
	address = {Belfast, UK},
	author = {Guillaume Aupy and Anne Benoit and Brice Goglin and Lo{\"\i}c Pottier and Yves Robert}
}
@techreport {1175,
	title = {C++ API for Batch BLAS},
	journal = {SLATE Working Notes},
	number = {04, ICL-UT-17-12},
	year = {2017},
	month = {2017-12},
	publisher = {University of Tennessee},
	author = {Ahmad Abdelfattah and Konstantin Arturov and Cris Cecka and Jack Dongarra and Chip Freitag and Mark Gates and Azzam Haidar and Jakub Kurzak and Piotr Luszczek and Stanimire Tomov and Panruo Wu}
}
@techreport {1081,
	title = {C++ API for BLAS and LAPACK},
	journal = {SLATE Working Notes},
	number = {02, ICL-UT-17-03},
	year = {2017},
	note = {Revision 02-21-2018},
	month = {2017-06},
	publisher = {Innovative Computing Laboratory, University of Tennessee},
	author = {Mark Gates and Piotr Luszczek and Ahmad Abdelfattah and Jakub Kurzak and Jack Dongarra and Konstantin Arturov and Cris Cecka and Chip Freitag}
}
@techreport {1138,
	title = {The Case for Directive Programming for Accelerator Autotuner Optimization},
	journal = {Innovative Computing Laboratory Technical Report},
	number = {ICL-UT-17-07},
	year = {2017},
	month = {2017-10},
	publisher = {University of Tennessee},
	abstract = {In this work, we present the use of compiler pragma directives for parallelizing autotuning of specialized compute kernels for hardware accelerators. A set of constructs, that include prallelizing a source code that prune a generated search space with a large number of constraints for an autotunning infrastructure. For a better performance we studied optimization aimed at minimization of the run time.We also studied the behavior of the parallel load balance and the speedup on four different machines: x86, Xeon Phi, ARMv8, and POWER8.},
	author = {Diana Fayad and Jakub Kurzak and Piotr Luszczek and Panruo Wu and Jack Dongarra}
}
@conference {1098,
	title = {Checkpointing Workflows for Fail-Stop Errors},
	booktitle = {IEEE Cluster},
	year = {2017},
	month = {2017-09},
	publisher = {IEEE},
	organization = {IEEE},
	address = {Honolulu, Hawaii},
	abstract = {We consider the problem of orchestrating the execution of workflow applications structured as Directed Acyclic Graphs (DAGs) on parallel computing platforms that are subject to fail-stop failures. The objective is to minimize expected overall execution time, or makespan. A solution to this problem consists of a schedule of the workflow tasks on the available processors and of a decision of which application data to checkpoint to stable storage, so as to mitigate the impact of processor failures. For general DAGs this problem is hopelessly intractable. In fact, given a solution, computing its expected makespan is still a difficult problem. To address this challenge, we consider a restricted class
of graphs, Minimal Series-Parallel Graphs (M-SPGS). It turns out that many real-world workflow applications are naturally structured as M-SPGS. For this class of graphs, we propose a recursive list-scheduling algorithm that exploits the M-SPG structure to assign sub-graphs to individual processors, and uses dynamic programming to decide which tasks in these sub-graphs should be checkpointed. Furthermore, it is possible to efficiently compute the expected makespan for the solution produced by this algorithm, using a first-order approximation of task weights and existing evaluation algorithms for 2-state probabilistic DAGs. We assess the performance of our algorithm for production workflow configurations, comparing it to (i) an approach in which all application data is checkpointed, which corresponds to the standard way in which most production workflows are executed today; and (ii) an approach in which no application data is checkpointed. Our results demonstrate that our algorithm strikes a good compromise between these two approaches, leading to lower checkpointing overhead than the former and to better resilience to failure than the latter.},
	author = {Li Han and Louis-Claude Canon and Henri Casanova and Yves Robert and Frederic Vivien}
}
@article {1131,
	title = {Comparing performance of s-step and pipelined GMRES on distributed-memory multicore CPUs},
	year = {2017},
	month = {2017-07},
	publisher = {SIAM Annual Meeting},
	address = {Pittsburgh, Pennsylvania},
	author = {Ichitaro Yamazaki and Mark Hoemmen and Piotr Luszczek and Jack Dongarra}
}
@conference {1094,
	title = {Co-Scheduling Algorithms for Cache-Partitioned Systems},
	booktitle = {19th Workshop on Advances in Parallel and Distributed Computational Models},
	year = {2017},
	month = {2017-05},
	publisher = {IEEE Computer Society Press},
	organization = {IEEE Computer Society Press},
	address = {Orlando, FL},
	abstract = {Cache-partitioned architectures allow subsections of the shared last-level cache (LLC) to be exclusively reserved for some applications. This technique dramatically limits interactions between applications that are concurrently executing on a multicore machine. Consider n applications that execute concurrently, with the objective to minimize the makespan, defined as the maximum completion time of the n applications. Key scheduling questions are: (i) which proportion of cache and (ii) how many processors should be given to each application? Here, we assign rational numbers of processors to each application, since they can be shared across applications through multi-threading. In this paper, we provide answers to (i) and (ii) for perfectly parallel applications. Even though the problem is shown to be NP-complete, we give key elements to determine the subset of applications that should share the LLC (while remaining ones only use their smaller private cache). Building upon these results, we design efficient heuristics for general applications. Extensive simulations demonstrate the usefulness of co-scheduling when our efficient cache partitioning strategies are deployed.},
	keywords = {Computational modeling, Degradation, Interference, Mathematical model, Program processors, Supercomputers, Throughput},
	doi = {10.1109/IPDPSW.2017.60},
	author = {Guillaume Aupy and Anne Benoit and Lo{\"\i}c Pottier and Padma Raghavan and Yves Robert and Manu Shantharam}
}
@article {1344,
	title = {Cholesky Factorization on Batches of Matrices with Fixed and Variable Sizes},
	year = {2016},
	month = {2016-04},
	publisher = {GPU Technology Conference (GTC16), Poster},
	address = {San Jose, CA},
	author = {Ahmad Abdelfattah and Azzam Haidar and Stanimire Tomov and Jack Dongarra}
}
@techreport {978,
	title = {Context Identifier Allocation in Open MPI},
	journal = {University of Tennessee Computer Science Technical Report},
	number = { ICL-UT-16-01},
	year = {2016},
	month = {2016-01},
	publisher = {Innovative Computing Laboratory, University of Tennessee},
	abstract = {The concept of communicators is a central notion in Message Passing Interface, allowing on one side the MPI implemen- tation to specialize it{\textquoteright}s matching and deliver messages in the right context, and on the other side the library developers to contextualize their message exchanges, and scope different algorithms to well-defined groups of processes. More pre- cisely, all communication objects in MPI are derived from a communicator at some point. All MPI functions allowing the creation of new communicators have a collective mean- ing, either over the group of processes from the parent com- municator or those from the target communicator. Thus, the perfromance of the communicator creation is tied to the col- lective communication performance, as well as the amount of data needed to be exchanged in order to consistently create this new communicator. We introduce several communica- tor creation algorithms, and present their implementation in the context of Open MPI. We explore the performance of these new algorithms and compare them with state-of-the- art algorithms available in other MPI implementations.},
	author = {George Bosilca and Thomas Herault and Jack Dongarra}
}
@conference {928,
	title = {Cholesky Across Accelerators},
	booktitle = {17th IEEE International Conference on High Performance Computing and Communications (HPCC 2015)},
	year = {2015},
	month = {2015-08},
	publisher = {IEEE},
	organization = {IEEE},
	address = {Elizabeth, NJ},
	author = {Asim YarKhan and Azzam Haidar and Chongxiao Cao and Piotr Luszczek and Stanimire Tomov and Jack Dongarra}
}
@conference {896,
	title = {Comparing Hybrid CPU-GPU and Native GPU-only Acceleration for Linear Algebra},
	booktitle = {2015 SIAM Conference on Applied Linear Algebra},
	year = {2015},
	month = {2015-10},
	publisher = {SIAM},
	organization = {SIAM},
	address = {Atlanta, GA},
	abstract = {Accelerating dense linear algebra using GPUs admits two models: hybrid CPU-GPU and GPU-only. The hybrid model factors the panel on the CPU while updating the trailing matrix on the GPU, concentrating the GPU on high-performance matrix multiplies. The GPU-only model performs the entire computation on the GPU, avoiding costly data transfers to the CPU. We compare these two approaches for three QR-based algorithms: QR factorization, rank revealing QR, and reduction to Hessenberg.},
	author = {Mark Gates and Stanimire Tomov and Azzam Haidar}
}
@article {852,
	title = {Composing Resilience Techniques: ABFT, Periodic, and Incremental Checkpointing},
	journal = {International Journal of Networking and Computing},
	volume = {5},
	number = {1},
	year = {2015},
	month = {2015-01},
	pages = {2-15},
	abstract = {Algorithm Based Fault Tolerant (ABFT) approaches promise unparalleled scalability and performance in failure-prone environments. Thanks to recent advances in the understanding of the involved mechanisms, a growing number of important algorithms (including all widely used factorizations) have been proven ABFT-capable. In the context of larger applications, these algorithms provide a temporal section of the execution, where the data is protected by its own intrinsic properties, and can therefore be algorithmically recomputed without the need of checkpoints. However, while typical scientific applications spend a significant fraction of their execution time in library calls that can be ABFT-protected, they interleave sections that are difficult or even impossible to protect with ABFT. As a consequence, the only practical fault-tolerance approach for these applications is checkpoint/restart. In this paper we propose a model to investigate the efficiency of a composite protocol, that alternates between ABFT and checkpoint/restart for the effective protection of an iterative application composed of ABFT- aware and ABFT-unaware sections. We also consider an incremental checkpointing composite approach in which the algorithmic knowledge is leveraged by a novel optimal dynamic program- ming to compute checkpoint dates. We validate these models using a simulator. The model and simulator show that the composite approach drastically increases the performance delivered by an execution platform, especially at scale, by providing the means to increase the interval between checkpoints while simultaneously decreasing the volume of each checkpoint. },
	keywords = {ABFT, checkpoint, fault-tolerance, High-performance computing, model, performance evaluation, resilience},
	issn = {ISSN 2185-2839},
	author = {George Bosilca and Aurelien Bouteiller and Thomas Herault and Yves Robert and Jack Dongarra}
}
@article {851,
	title = {Computing Low-rank Approximation of a Dense Matrix on Multicore CPUs with a GPU and its Application to Solving a Hierarchically Semiseparable Linear System of Equations},
	journal = {Scientific Programming},
	year = {2015},
	abstract = {Low-rank matrices arise in many scientific and engineering computation. Both computational and storage costs of manipulating such matrices may be reduced by taking advantages of their low-rank properties. To compute a low-rank approximation of a dense matrix, in this paper, we study the performance of QR factorization with column pivoting or with restricted pivoting on multicore CPUs with a GPU. We first propose several techniques to reduce the postprocessing time, which is required for restricted pivoting, on a modern CPU. We then examine the potential of using a GPU to accelerate the factorization process with both column and restricted pivoting. Our performance results on two eight-core Intel Sandy Bridge CPUs with one NVIDIA Kepler GPU demonstrate that using the GPU, the factorization time can be reduced by a factor of more than two. In addition, to study the performance of our implementations in practice, we integrate them into a recently-developed software StruMF which algebraically exploits such low-rank structures for solving a general sparse linear system of equations. Our performance results for solving Poisson{\textquoteright}s equations demonstrate that the proposed techniques can significantly reduce the preconditioner construction time of StruMF on the CPUs, and the construction time can be further reduced by 10\%-50\% using the GPU.},
	author = {Ichitaro Yamazaki and Stanimire Tomov and Jack Dongarra}
}
@conference {836,
	title = {clMAGMA: High Performance Dense Linear Algebra with OpenCL },
	booktitle = {International Workshop on OpenCL},
	year = {2014},
	month = {2014-05},
	address = {Bristol University, England},
	abstract = {This paper presents the design and implementation of several fundamental dense linear algebra (DLA) algorithms in OpenCL. In particular, these are linear system solvers and eigenvalue problem solvers. Further, we give an overview of the clMAGMA library, an open source, high performance OpenCL library that incorporates the developments presented, and in general provides to heterogeneous architectures the DLA functionality of the popular LAPACK library. The LAPACK-compliance and use of OpenCL simplify the use of clMAGMA in applications, while providing them with portably performant DLA. High performance is obtained through use of the high-performance OpenCL BLAS, hardware and OpenCL-specific tuning, and a hybridization methodology where we split the algorithm into computational tasks of various granularities. Execution of those tasks is properly scheduled over the heterogeneous hardware components by minimizing data movements and mapping algorithmic requirements to the architectural strengths of the various heterogeneous hardware components.},
	author = {Chongxiao Cao and Jack Dongarra and Peng Du and Mark Gates and Piotr Luszczek and Stanimire Tomov}
}
@article {815,
	title = {Communication-Avoiding Symmetric-Indefinite Factorization},
	journal = {SIAM Journal on Matrix Analysis and Application},
	volume = {35},
	year = {2014},
	month = {2014-07},
	pages = {1364-1406},
	abstract = {We describe and analyze a novel symmetric triangular factorization algorithm. The algorithm is essentially a block version of Aasen{\textquoteright}s triangular tridiagonalization. It factors a dense symmetric matrix A as the product A = P LT L T P T where P is a permutation matrix, L is lower triangular, and T is block tridiagonal and banded. The algorithm is the first symmetric-indefinite communication-avoiding factorization: it performs an asymptotically optimal amount of communication in a two-level memory hierarchy for almost any cache-line size. Adaptations of the algorithm to parallel computers are likely to be communication efficient as well; one such adaptation has been recently published. The current paper describes the algorithm, proves that it is numerically stable, and proves that it is communication optimal.},
	keywords = {plasma},
	author = {Grey Ballard and Dulceneia Becker and James Demmel and Jack Dongarra and Alex Druinsky and I Peled and Oded Schwartz and Sivan Toledo and Ichitaro Yamazaki}
}
@conference {832,
	title = {Computing Least Squares Condition Numbers on Hybrid Multicore/GPU Systems},
	booktitle = {International Interdisciplinary Conference on Applied Mathematics, Modeling and Computational Science (AMMCS)},
	year = {2014},
	month = {2014-08},
	address = {Waterloo, Ontario, CA},
	abstract = {This paper presents an efficient computation for least squares conditioning or estimates of it. We propose performance results using new routines on top of the multicore-GPU library MAGMA. This set of routines is based on an efficient computation of the variance-covariance matrix for which, to our knowledge, there is no implementation in current public domain libraries LAPACK and ScaLAPACK.},
	author = {Marc Baboulin and Jack Dongarra and Remi Lacroix}
}
@techreport {681,
	title = {clMAGMA: High Performance Dense Linear Algebra with OpenCL},
	journal = {University of Tennessee Technical Report (Lawn 275)},
	number = {UT-CS-13-706},
	year = {2013},
	month = {2013-03},
	publisher = {University of Tennessee},
	abstract = {This paper presents the design and implementation of sev- eral fundamental dense linear algebra (DLA) algorithms in OpenCL. In particular, these are linear system solvers and eigenvalue problem solvers. Further, we give an overview of the clMAGMA library, an open source, high performance OpenCL library that incorporates the developments pre- sented, and in general provides to heterogeneous architec- tures the DLA functionality of the popular LAPACK library. The LAPACK-compliance and use of OpenCL simplify the use of clMAGMA in applications, while providing them with portably performant DLA. High performance is ob- tained through use of the high-performance OpenCL BLAS, hardware and OpenCL-speci c tuning, and a hybridization methodology where we split the algorithm into computa- tional tasks of various granularities. Execution of those tasks is properly scheduled over the heterogeneous hardware components by minimizing data movements and mapping algorithmic requirements to the architectural strengths of the various heterogeneous hardware components.},
	author = {Chongxiao Cao and Jack Dongarra and Peng Du and Mark Gates and Piotr Luszczek and Stanimire Tomov}
}
@techreport {684,
	title = {On the Combination of Silent Error Detection and Checkpointing},
	journal = {UT-CS-13-710},
	year = {2013},
	month = {2013-06},
	publisher = {University of Tennessee Computer Science Technical Report},
	abstract = {In this paper, we revisit traditional checkpointing and rollback recovery strategies, with a focus on silent data corruption errors. Contrarily to fail-stop failures, such latent errors cannot be detected immediately, and a mechanism to detect them must be provided. We consider two models: (i) errors are detected after some delays following a probability distribution (typically, an Exponential distribution); (ii) errors are detected through some verification mechanism. In both cases, we compute the optimal period in order to minimize the waste, i.e., the fraction of time where nodes do not perform useful computations. In practice, only a fixed number of checkpoints can be kept in memory, and the first model may lead to an irrecoverable failure. In this case, we compute the minimum period required for an acceptable risk. For the second model, there is no risk of irrecoverable failure, owing to the verification mechanism, but the corresponding overhead is included in the waste. Finally, both models are instantiated using realistic scenarios and application/architecture parameters.},
	keywords = {checkpointing, error recovery, High-performance computing, silent data corruption, verification},
	url = {http://www.netlib.org/lapack/lawnspdf/lawn278.pdf},
	author = {Guillaume Aupy and Anne Benoit and Thomas Herault and Yves Robert and Frederic Vivien and Dounia Zaidouni}
}
@article {750,
	title = {Correlated Set Coordination in Fault Tolerant Message Logging Protocols},
	journal = {Concurrency and Computation: Practice and Experience},
	volume = {25},
	year = {2013},
	month = {2013-03},
	pages = {572-585},
	abstract = {With our current expectation for the exascale systems, composed of hundred of thousands of many-core nodes, the mean time between failures will become small, even under the most optimistic assumptions. One of the most scalable checkpoint restart techniques, the message logging approach, is the most challenged when the number of cores per node increases because of the high overhead of saving the message payload. Fortunately, for two processes on the same node, the failure probability is correlated, meaning that coordinated recovery is free. In this paper, we propose an intermediate approach that uses coordination between correlated processes but retains the scalability advantage of message logging between independent ones. The algorithm still belongs to the family of event logging protocols but eliminates the need for costly payload logging between coordinated processes.},
	doi = {10.1002/cpe.2859},
	author = {Aurelien Bouteiller and Thomas Herault and George Bosilca and Jack Dongarra}
}
@inproceedings {716,
	title = {CPU-GPU Hybrid Bidiagonal Reduction With Soft Error Resilience},
	journal = {ScalA {\textquoteright}13 Proceedings of the Workshop on Latest Advances in Scalable Algorithms for Large-Scale Systems},
	year = {2013},
	month = {2013-11},
	address = {Montpellier, France},
	abstract = {Soft errors pose a real challenge to applications running on modern hardware as the feature size becomes smaller and the integration density increases for both the modern processors and the memory chips. Soft errors manifest themselves as bit-flips that alter the user value, and numerical software is a category of software that is sensitive to such data changes. In this paper, we present a design of a bidiagonal reduction algorithm that is resilient to soft errors, and we also describe its implementation on hybrid CPU-GPU architectures. Our fault-tolerant algorithm employs Algorithm Based Fault Tolerance, combined with reverse computation, to detect, locate, and correct soft errors. The tests were performed on a Sandy Bridge CPU coupled with an NVIDIA Kepler GPU. The included experiments show that our resilient bidiagonal reduction algorithm adds very little overhead compared to the error-prone code. At matrix size 10110 x 10110, our algorithm only has a performance overhead of 1.085\% when one error occurs, and 0.354\% when no errors occur.},
	author = {Yulu Jia and Piotr Luszczek and George Bosilca and Jack Dongarra}
}
@inproceedings {icl:679,
	title = {A Checkpoint-on-Failure Protocol for Algorithm-Based Recovery in Standard MPI},
	journal = {18th International European Conference on Parallel and Distributed Computing (Euro-Par 2012) (Best Paper Award)},
	year = {2012},
	month = {2012-08},
	publisher = {Springer-Verlag},
	address = {Rhodes, Greece},
	author = {Wesley Bland and Peng Du and Aurelien Bouteiller and Thomas Herault and George Bosilca and Jack Dongarra},
	editor = {Christos Kaklamanis and Theodore Papatheodorou and Paul Spirakis}
}
@inproceedings {icl:685,
	title = {A Class of Communication-Avoiding Algorithms for Solving General Dense Linear Systems on CPU/GPU Parallel Machines},
	journal = {Proc. of the International Conference on Computational Science (ICCS)},
	volume = {9},
	year = {2012},
	month = {2012-06},
	pages = {17-26},
	keywords = {magma},
	author = {Marc Baboulin and Simplice Donfack and Jack Dongarra and Laura Grigori and Adrien Remi and Stanimire Tomov}
}
@article {icl:695,
	title = {A Comprehensive Study of Task Coalescing for Selecting Parallelism Granularity in a Two-Stage Bidiagonal Reduction},
	journal = {IPDPS 2012},
	year = {2012},
	month = {2012-05},
	address = {Shanghai, China},
	author = {Azzam Haidar and Hatem Ltaeif and Piotr Luszczek and Jack Dongarra}
}
@article {icl:587,
	title = {Changes in Dense Linear Algebra Kernels - Decades Long Perspective},
	journal = {in Solving the Schrodinger Equation: Has everything been tried? (to appear)},
	year = {2011},
	month = {2011-00},
	publisher = {Imperial College Press},
	author = {Piotr Luszczek and Jakub Kurzak and Jack Dongarra},
	editor = {P. Popular}
}
@inproceedings {icl:640,
	title = {A Class of Hybrid LAPACK Algorithms for Multicore and GPU Architectures},
	journal = {Symposium for Application Accelerators in High Performance Computing (SAAHPC{\textquoteright}11)},
	year = {2011},
	month = {2011-07},
	address = {Knoxville, TN},
	keywords = {magma, quark},
	author = {Mitch Horton and Stanimire Tomov and Jack Dongarra}
}
@inproceedings {icl:673,
	title = {Correlated Set Coordination in Fault Tolerant Message Logging Protocols},
	journal = {Proceedings of 17th International Conference, Euro-Par 2011, Part II},
	volume = {6853},
	year = {2011},
	month = {2011-08},
	pages = {51-64},
	publisher = {Springer},
	address = {Bordeaux, France},
	keywords = {ftmpi},
	author = {Aurelien Bouteiller and Thomas Herault and George Bosilca and Jack Dongarra},
	editor = {Emmanuel Jeannot and Raymond Namyst and Jean Roman}
}
@inproceedings {icl:598,
	title = {Can Hardware Performance Counters Produce Expected, Deterministic Results?},
	journal = {3rd Workshop on Functionality of Hardware Performance Monitoring},
	year = {2010},
	month = {2010-12},
	address = {Atlanta, GA},
	keywords = {papi},
	author = {Vincent M Weaver and Jack Dongarra}
}
@article {icl:572,
	title = {A Class of Parallel Tiled Linear Algebra Algorithms for Multicore Architectures},
	journal = {Parallel Computing (to appear)},
	year = {2010},
	month = {2010-00},
	author = {Alfredo Buttari and Julien Langou and Jakub Kurzak and Jack Dongarra}
}
@article {icl:557,
	title = {Collecting Performance Data with PAPI-C},
	journal = {Tools for High Performance Computing 2009},
	year = {2010},
	month = {2010-05},
	pages = {157-173},
	publisher = {Springer Berlin / Heidelberg},
	address = {3rd Parallel Tools Workshop, Dresden, Germany},
	abstract = {Modern high performance computer systems continue to increase in size and complexity. Tools to measure application performance in these increasingly complex environments must also increase the richness of their measurements to provide insights into the increasingly intricate ways in which software and hardware interact. PAPI (the Performance API) has provided consistent platform and operating system independent access to CPU hardware performance counters for nearly a decade. Recent trends toward massively parallel multi-core systems with often heterogeneous architectures present new challenges for the measurement of hardware performance information, which is now available not only on the CPU core itself, but scattered across the chip and system. We discuss the evolution of PAPI into Component PAPI, or PAPI-C, in which multiple sources of performance data can be measured simultaneously via a common software interface. Several examples of components and component data measurements are discussed. We explore the challenges to hardware performance measurement in existing multi-core architectures. We conclude with an exploration of future directions for the PAPI interface.},
	keywords = {mumi, papi},
	doi = {https://doi.org/10.1007/978-3-642-11261-4_11},
	author = {Dan Terpstra and Heike Jagode and Haihang You and Jack Dongarra}
}
@article {icl:555,
	title = {Constructing Resiliant Communication Infrastructure for Runtime Environments in Advances in Parallel Computing},
	journal = {Advances in Parallel Computing - Parallel Computing: From Multicores and GPU{\textquoteright}s to Petascale},
	volume = {19},
	year = {2010},
	pages = {441-451},
	doi = {10.3233/978-1-60750-530-3-441},
	author = {George Bosilca and Camille Coti and Thomas Herault and Pierre Lemariner and Jack Dongarra},
	editor = {Barbara Chapman and Frederic Desprez and Gerhard R. Joubert and Alain Lichnewsky and Frans Peters and T. Priol}
}
@article {icl:596,
	title = {Capturing and Analyzing the Execution Control Flow of OpenMP Applications},
	journal = {International Journal of Parallel Programming},
	volume = {37},
	number = {3},
	year = {2009},
	month = {2009-00},
	pages = {266-276},
	author = {Karl F{\"u}rlinger and Shirley Moore}
}
@article {icl:509,
	title = {A Class of Parallel Tiled Linear Algebra Algorithms for Multicore Architectures},
	journal = {Parallel Computing},
	volume = {35},
	year = {2009},
	month = {2009-00},
	pages = {38-53},
	keywords = {plasma},
	author = {Alfredo Buttari and Julien Langou and Jakub Kurzak and Jack Dongarra}
}
@inproceedings {icl:488,
	title = {Comparative Study of One-Sided Factorizations with Multiple Software Packages on Multi-Core Hardware},
	journal = {2009 International Conference for High Performance Computing, Networking, Storage, and Analysis (SC {\textquoteright}09) (to appear)},
	year = {2009},
	month = {2009-00},
	author = {Emmanuel Agullo and Bilel Hadri and Hatem Ltaeif and Jack Dongarra}
}
@article {icl:507,
	title = {Computational Science {\textendash} ICCS 2009, Proceedings of the 9th International Conference},
	journal = {Lecture Notes in Computer Science: Theoretical Computer Science and General Issues},
	volume = {-},
	number = {5544-5545},
	year = {2009},
	month = {2009-05},
	address = {Baton Rouge, LA},
	editor = {Gabrielle Allen and Jaros{\l}aw Nabrzyski and E. Seidel and Geert Dick van Albada and Jack Dongarra and Peter M. Sloot}
}
@article {icl:482,
	title = {Computing the Conditioning of the Components of a Linear Least-squares Solution},
	journal = {Numerical Linear Algebra with Applications},
	volume = {16},
	number = {7},
	year = {2009},
	month = {2009-00},
	pages = {517-533},
	author = {Marc Baboulin and Jack Dongarra and Serge Gratton and Julien Langou}
}
@techreport {icl:484,
	title = {Constructing resiliant communication infrastructure for runtime environments},
	journal = {Innovative Computing Laboratory Technical Report},
	number = {ICL-UT-09-02},
	year = {2009},
	month = {2009-07},
	author = {George Bosilca and Camille Coti and Thomas Herault and Pierre Lemariner and Jack Dongarra}
}
@article {icl:517,
	title = {Constructing Resilient Communication Infrastructure for Runtime Environments},
	journal = {ParCo 2009},
	year = {2009},
	month = {2009-09},
	address = {Lyon France},
	author = {Pierre Lemariner and George Bosilca and Camille Coti and Thomas Herault and Jack Dongarra}
}
@inproceedings {icl:418,
	title = {A Comparison of Search Heuristics for Empirical Code Optimization},
	journal = {The 3rd international Workshop on Automatic Performance Tuning},
	year = {2008},
	month = {2008-10},
	address = {Tsukuba, Japan},
	keywords = {gco},
	author = {Keith Seymour and Haihang You and Jack Dongarra}
}
@article {icl:457,
	title = {Computing the Conditioning of the Components of a Linear Least Squares Solution},
	journal = {VECPAR {\textquoteright}08, High Performance Computing for Computational Science},
	year = {2008},
	month = {2008-01},
	address = {Toulouse, France},
	author = {Marc Baboulin and Jack Dongarra and Serge Gratton and Julien Langou}
}
@inproceedings {icl:463,
	title = {Custom assignment of MPI ranks for parallel multi-dimensional FFTs: Evaluation of BG/P versus BG/L},
	journal = {Proceedings of the 2008 IEEE International Symposium on Parallel and Distributed Processing with Applications (ISPA-08)},
	year = {2008},
	month = {2008-01},
	pages = {271-283},
	publisher = {IEEE Computer Society},
	address = {Sydney, Australia},
	author = {Heike Jagode and Joachim Hein}
}
@techreport {icl:375,
	title = {A Class of Parallel Tiled Linear Algebra Algorithms for Multicore Architectures},
	journal = {University of Tennessee Computer Science Technical Report},
	number = {UT-CS-07-600 (also LAPACK Working Note 191)},
	year = {2007},
	month = {2007-01},
	keywords = {plasma},
	author = {Alfredo Buttari and Julien Langou and Jakub Kurzak and Jack Dongarra}
}
@article {icl:360,
	title = {A Comparison of Application Performance Using Open MPI and Cray MPI},
	journal = {Cray User Group, CUG 2007},
	year = {2007},
	month = {2007-05},
	author = {Richard L. Graham and George Bosilca and Jelena Pjesivac{\textendash}Grbovic}
}
@techreport {icl:391,
	title = {Computing the Conditioning of the Components of a Linear Least Squares Solution},
	journal = {University of Tennessee Computer Science Technical Report},
	number = {UT-CS-07-604, (also LAPACK Working Note 193)},
	year = {2007},
	month = {2007-01},
	author = {Marc Baboulin and Jack Dongarra and Serge Gratton and Julien Langou}
}
@inproceedings {icl:383,
	title = {Continuous Runtime Profiling of OpenMP Applications},
	journal = {Proceedings of the 2007 Conference on Parallel Computing (PARCO 2007)},
	year = {2007},
	month = {2007-01},
	address = {Juelich and Aachen, Germany},
	keywords = {kojak},
	author = {Karl F{\"u}rlinger and Shirley Moore}
}
@article {icl:396,
	title = {Creating Software Technology to Harness the Power of Leadership-class Computing Systems},
	journal = {DOE SciDAC Review (to appear)},
	year = {2007},
	month = {2007-06},
	author = {John Mellor-Crummey and Pete Beckman and Jack Dongarra and Barton Miller and Katherine Yelick}
}
@article {icl:402,
	title = {Conjugate-Gradient Eigenvalue Solvers in Computing Electronic Properties of Nanostructure Architectures},
	journal = {International Journal of Computational Science and Engineering},
	volume = {2},
	number = {3/4},
	year = {2006},
	month = {2006-00},
	pages = {205-212},
	author = {Stanimire Tomov and Julien Langou and Jack Dongarra and Andrew Canning and Lin-Wang Wang}
}
@inproceedings {icl:284,
	title = {Comparison of Nonlinear Conjugate-Gradient methods for computing the Electronic Properties of Nanostructure Architectures},
	journal = {Proceedings of 5th International Conference on Computational Science (ICCS)},
	year = {2005},
	month = {2005-01},
	pages = {317-325},
	publisher = {Springer{\textquoteright}s Lecture Notes in Computer Science},
	address = {Atlanta, GA, USA},
	keywords = {doe-nano},
	author = {Stanimire Tomov and Julien Langou and Andrew Canning and Lin-Wang Wang and Jack Dongarra},
	editor = {V. S. Sunderman and Geert Dick van Albada and Peter M. Sloot and Jack Dongarra}
}
@article {icl:277,
	title = {The Component Structure of a Self-Adapting Numerical Software System},
	journal = {International Journal of Parallel Programming},
	volume = {33},
	number = {2},
	year = {2005},
	month = {2005-06},
	keywords = {salsa, sans},
	author = {Victor Eijkhout and Erika Fuentes and Thomas Eidson and Jack Dongarra}
}
@techreport {icl:303,
	title = {Condition Numbers of Gaussian Random Matrices},
	journal = {University of Tennessee Computer Science Department Technical Report},
	volume = {{\textendash}04-539},
	year = {2005},
	month = {2005-00},
	keywords = {ft-la},
	author = {Zizhong Chen and Jack Dongarra}
}
@article {icl:266,
	title = {Condition Numbers of Gaussian Random Matrices},
	journal = {SIAM Journal on Matrix Analysis and Applications (to appear)},
	year = {2005},
	month = {2005-01},
	keywords = {ftmpi, grads, lacsi, sans},
	author = {Zizhong Chen and Jack Dongarra}
}
@article {icl:292,
	title = {Conjugate-Gradient Eigenvalue Solvers in Computing Electronic Properties of Nanostructure Architectures},
	journal = {International Journal of Computational Science and Engineering (to appear)},
	year = {2005},
	month = {2005-01},
	author = {Stanimire Tomov and Julien Langou and Andrew Canning and Lin-Wang Wang and Jack Dongarra}
}
@article {icl:236,
	title = {Cray X1 Evaluation Status Report},
	journal = {Oak Ridge National Laboratory Report},
	volume = {/-2004/13},
	year = {2004},
	month = {2004-01},
	author = {Pratul Agarwal and R. A. Alexander and E. Apra and Satish Balay and Arthur S. Bland and James Colgan and Eduardo D{\textquoteright}Azevedo and Jack Dongarra and Tom Dunigan and Mark Fahey and Al Geist and M. Gordon and Robert Harrison and Dinesh Kaushik and M. Krishnakumar and Piotr Luszczek and Tony Mezzacapa and Jeff Nichols and Jarek Nieplocha and Leonid Oliker and T. Packwood and M. Pindzola and Thomas C. Schulthess and Jeffrey Vetter and James B White and T. Windus and Patrick H. Worley and Thomas Zacharia}
}
@techreport {icl:196,
	title = {CUBE User Manual},
	journal = {ICL Technical Report},
	number = {ICL-UT-04-01},
	year = {2004},
	month = {2004-02},
	keywords = {kojak},
	author = {Fengguang Song and Felix Wolf}
}
@article {icl:169,
	title = {Computational Science {\textemdash} ICCS 2003},
	journal = {Lecture Notes in Computer Science},
	volume = {2657-2660},
	year = {2003},
	month = {2003-06},
	publisher = {Springer-Verlag, Berlin},
	address = {ICCS 2003, International Conference. Melbourne, Australia},
	issn = {978-3-540-40194-0},
	author = {Peter M. Sloot and David Abramson and Alexander V. Bogdanov and Jack Dongarra and Albert Zomaya and Yuriy Gorbachev}
}
@conference {icl:76,
	title = {A Comparison of Counting and Sampling Modes of Using Performance Monitoring Hardware},
	booktitle = {International Conference on Computational Science (ICCS 2002)},
	year = {2002},
	month = {2002-04},
	publisher = {Springer},
	organization = {Springer},
	address = {Amsterdam, Netherlands},
	abstract = {Performance monitoring hardware is available on most modern microprocessors in the form of hardware counters and other registers that record data about processor events. This hardware may be used in counting mode, in which aggregate events counts are accumulated, and/or in sampling mode, in which time-based or event-based sampling is used to collect profiling data. This paper discusses uses of these two modes and considers the issues of efficiency and accuracy raised by each. Implications for the PAPI cross-platform hardware counter interface are also discussed.},
	keywords = {papi},
	doi = {https://doi.org/10.1007/3-540-46080-2_95},
	author = {Shirley Moore}
}
@article {icl:113,
	title = {A Comparison of Parallel Solvers for General Narrow Banded Linear Systems},
	journal = {Parallel and Distributed Computing Practices},
	volume = {2},
	year = {2002},
	month = {2002-10},
	pages = {385-400},
	author = {Peter Arbenz and Andrew Cleary and Jack Dongarra and Markus Hegland}
}
@article {icl:87,
	title = {On the Convergence of Computational and Data Grids},
	journal = {Parallel Processing Letters},
	volume = {11},
	number = {2-3},
	year = {2001},
	month = {2001-01},
	pages = {187-202},
	keywords = {netsolve},
	author = {Dorian Arnold and Sathish Vadhiyar and Jack Dongarra}
}
@techreport {icl:51,
	title = {A Comparison of Parallel Solvers for Diagonally Dominant and General Narrow Banded Linear Systems II (LAPACK Working Note 143)},
	journal = {University of Tennessee Computer Science Department Technical Report},
	number = {UT-CS-99-415},
	year = {1999},
	month = {1999-01},
	author = {Peter Arbenz and Andrew Cleary and Jack Dongarra and Markus Hegland}
}
@techreport {icl:52,
	title = {A Comparison of Parallel Solvers for General Narrow Banded Linear Systems (LAPACK Working Note 142)},
	journal = {University of Tennessee Computer Science Technical Report},
	number = {UT-CS-99-414},
	year = {1999},
	month = {1999-01},
	author = {Peter Arbenz and Andrew Cleary and Jack Dongarra and Markus Hegland}
}
