@conference {, title = {PAQR: Pivoting Avoiding QR factorization}, booktitle = {2023 IEEE International Parallel and Distributed Processing Symposium (IPDPS)}, year = {2023}, publisher = {IEEE}, organization = {IEEE}, address = {St. Petersburg, FL, USA}, doi = {10.1109/IPDPS54959.2023.00040}, url = {https://ieeexplore.ieee.org/document/10177407/}, author = {Sid-Lakhdar, Wissam and Cayrols, Sebastien and Bielich, Daniel and Abdelfattah, Ahmad and Luszczek, Piotr and Gates, Mark and Tomov, Stanimire and Johansen, Hans and Williams-Young, David and Davis, Timothy and Dongarra, Jack and Anzt, Hartwig} } @conference {, title = {Parallel Symbolic Cholesky Factorization}, booktitle = {SC-W 2023: Workshops of The International Conference on High Performance Computing, Network, Storage, and Analysis}, year = {2023}, month = {2023-11}, publisher = {ACM}, organization = {ACM}, address = {Denver, CO}, abstract = {We present a hybrid sequential/parallel symbolic Cholesky factorization algorithm that computes the sparsity pattern of the symbolic factors in parallel. We evaluate the performance on a large subset of the SuiteSparse matrix collection and multicore CPUs as well as flagship GPUs by AMD and NVIDIA, achieving speedups of an order of magnitude compared to a state-of-the-art sequential symbolic Cholesky factorization.}, isbn = {9798400707858}, doi = {10.1145/3624062.3624253}, url = {https://dl.acm.org/doi/proceedings/10.1145/3624062}, author = {Ribizel, Tobias and Anzt, Hartwig} } @conference {, title = {Performance Insights into Device-initiated RMA Using Kokkos Remote Spaces}, booktitle = {2023 IEEE International Conference on Cluster Computing Workshops (CLUSTER Workshops)}, year = {2023}, month = {2023-11}, publisher = {IEEE}, organization = {IEEE}, address = {Santa Fe, NM, USA}, abstract = {Achieving scalable performance on supercomputers requires careful coordination of communication and computation. Often, MPI applications rely on buffering, packing, and sorting techniques to accommodate a two-sided API, minimize communication overhead, and achieve performance goals. As interconnects between accelerators become more performant and scalable, programming models such as SHMEM may have the opportunity to enable bandwidth maximization along with ease of programming. In this work, we take a closer look at device-initiated PGAS programming models using NVIDIA Corp{\textquoteright}s NVSHMEM communication library and our interface through the Kokkos Remote Spaces project. We show that benchmarks can benefit from this programming model in terms of performance and programmability. We anticipate similar results for miniapplications.}, doi = {10.1109/CLUSTERWorkshops61457.2023.00028}, url = {https://ieeexplore.ieee.org/document/10321871/}, author = {Mishler, Daniel and Ciesko, Jan and Olivier, Stephen and Bosilca, George} } @conference {, title = {Preconditioners for Batched Iterative Linear Solvers on GPUs}, booktitle = {Smoky Mountains Computational Sciences and Engineering Conference}, volume = {169075}, year = {2023}, month = {2023-01}, pages = {38 - 53}, publisher = {Springer Nature Switzerland}, organization = {Springer Nature Switzerland}, abstract = {Batched iterative solvers can be an attractive alternative to batched direct solvers if the linear systems allow for fast convergence. In non-batched settings, iterative solvers are often enhanced with sophisticated preconditioners to improve convergence. In this paper, we develop preconditioners for batched iterative solvers that improve the iterative solver convergence without incurring detrimental resource overhead and preserving much of the iterative solver flexibility. We detail the design and implementation considerations, present a user-friendly interface to the batched preconditioners, and demonstrate the convergence and runtime benefits over non-preconditioned batched iterative solvers on state-of-the-art GPUs for a variety of benchmark problems from finite difference stencil matrices, the Suitesparse matrix collection and a computational chemistry application.}, isbn = {978-3-031-23605-1}, doi = {10.1007/978-3-031-23606-810.1007/978-3-031-23606-8_3}, url = {https://link.springer.com/chapter/10.1007/978-3-031-23606-8_3}, author = {Aggarwal, Isha and Nayak, Pratik and Kashi, Aditya and Anzt, Hartwig}, editor = {Doug, Kothe and Al, Geist and Pophale, Swaroop and Liu, Hong and Parete-Koon, Suzanne} } @techreport {, title = {PAQR: Pivoting Avoiding QR factorization}, journal = {ICL Technical Report}, number = {ICL-UT-22-06}, year = {2022}, month = {2022-06}, abstract = {The solution of linear least-squares problems is at the heart of many scientific and engineering applications. While any method able to minimize the backward error of such problems is considered numerically stable, the theory states that the forward error depends on the condition number of the matrix in the system of equations. On the one hand, the QR factorization is an efficient method to solve such problems, but the solutions it produces may have large forward errors when the matrix is deficient. On the other hand, QR with column pivoting (QRCP) is able to produce smaller forward errors on deficient matrices, but its cost is prohibitive compared to QR. The aim of this paper is to propose PAQR, an alternative solution method with the same cost (or smaller) as QR and as accurate as QRCP in practical cases, for the solution of rank-deficient linear least-squares problems. After presenting the algorithm and its implementations on different architectures, we compare its accuracy and performance results on a variety of application problems. }, author = {Wissam M. Sid-Lakhdar and Sebastien Cayrols and Daniel Bielich and Ahmad Abdelfattah and Piotr Luszczek and Mark Gates and Stanimire Tomov and Hans Johansen and David Williams-Young and Timothy A. Davis and Jack Dongarra} } @conference {, title = {Performance Analysis of Parallel FFT on Large Multi-GPU Systems}, booktitle = {2022 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)}, year = {2022}, month = {2022-08}, publisher = {IEEE}, organization = {IEEE}, address = {Lyon, France}, doi = {10.1109/IPDPSW55747.2022.00072}, url = {https://ieeexplore.ieee.org/document/9835388/}, author = {Ayala, Alan and Stanimire Tomov and Stoyanov, Miroslav and Haidar, Azzam and Dongarra, Jack} } @inbook {, title = {Performance Application Programming Interface}, booktitle = {Accelerated Computing with HIP}, year = {2022}, month = {2022-12}, publisher = {Sun, Baruah and Kaeli}, organization = {Sun, Baruah and Kaeli}, isbn = {B0BR8KSS7K}, url = {https://a.co/d/0DoG5as}, author = {Anthony Danalis and Heike Jagode} } @inproceedings {, title = {Porting Sparse Linear Algebra to~Intel GPUs}, journal = {Euro-Par 2021: Parallel Processing Workshops}, volume = {13098}, year = {2022}, month = {2022-06}, pages = {57 - 68}, publisher = {Springer International Publishing}, address = {Lisbon, Portugal}, abstract = {With discrete Intel GPUs entering the high performance computing landscape, there is an urgent need for production-ready software stacks for these platforms. In this paper, we report how we prepare the Ginkgo math library for Intel GPUs by developing a kernel backed based on the DPC++ programming environment. We discuss conceptual differences to the CUDA and HIP programming models and describe workflows for simplified code conversion. We benchmark advanced sparse linear algebra routines utilizing the converted kernels to assess the efficiency of the DPC++ backend in the hardware-specific performance bounds. We compare the performance of basic building blocks against routines providing the same functionality that ship with Intel{\textquoteright}s oneMKL vendor library.}, keywords = {Ginkgo, Intel GPUs, math library, oneAPI, SpMV}, isbn = {978-3-031-06155-4}, doi = {10.1007/978-3-031-06156-1_5}, url = {https://link.springer.com/chapter/10.1007/978-3-031-06156-1_5}, author = {Tsai, Yuhsiang M. and Cojean, Terry and Anzt, Hartwig}, editor = {Chaves, Ricardo and B. Heras, Dora and Ilic, Aleksandar and Unat, Didem and Badia, Rosa M. and Bracciali, Andrea and Diehl, Patrick and Dubey, Anshu and Sangyoon, Oh and L. Scott, Stephen and Ricci, Laura} } @inproceedings {, title = {Prediction of Optimal Solvers for Sparse Linear Systems Using Deep Learning}, journal = {2022 SIAM Conference on Parallel Processing for Scientific Computing (PP)}, year = {2022}, month = {2022}, pages = {14 - 24}, publisher = {Society for Industrial and Applied Mathematics}, address = {Philadelphia, PA}, abstract = {Solving sparse linear systems is a key task in a number of computational problems, such as data analysis and simulations, and majorly determines overall execution time. Choosing a suitable iterative solver algorithm, however, can significantly improve time-to-completion. We present a deep learning approach designed to predict the optimal iterative solver for a given sparse linear problem. For this, we detail useful linear system features to drive the prediction process, the metrics we use to quantify the iterative solvers{\textquoteright} time-to-approximation performance and a comprehensive experimental evaluation of the prediction quality of the neural network. Using a hyperparameter optimization and an ablation study on the SuiteSparse matrix collection we have inferred the importance of distinct features, achieving a top-1 classification accuracy of 60\%.}, doi = {10.1137/1.978161197714110.1137/1.9781611977141.2}, url = {https://epubs.siam.org/doi/10.1137/1.9781611977141.2}, author = {Funk, Yannick and G{\"o}tz, Markus and Anzt, Hartwig}, editor = {Li, Xiaoye S. and Teranishi, Keita} } @article {, title = {Providing performance portable numerics for Intel GPUs}, journal = {Concurrency and Computation: Practice and Experience}, volume = {17}, year = {2022}, month = {2022-10}, abstract = {With discrete Intel GPUs entering the high-performance computing landscape, there is an urgent need for production-ready software stacks for these platforms. In this article, we report how we enable the Ginkgo math library to execute on Intel GPUs by developing a kernel backed based on the DPC++ programming environment. We discuss conceptual differences between the CUDA and DPC++ programming models and describe workflows for simplified code conversion. We evaluate the performance of basic and advanced sparse linear algebra routines available in Ginkgo{\textquoteright}s DPC++ backend in the hardware-specific performance bounds and compare against routines providing the same functionality that ship with Intel{\textquoteright}s oneMKL vendor library.}, keywords = {Ginkgo, Intel GPUs, math library, oneAPI, SpMV}, issn = {1532-0626}, doi = {10.1002/cpe.7400}, url = {https://onlinelibrary.wiley.com/doi/full/10.1002/cpe.7400}, author = {Tsai, Yu-Hsiang M. and Cojean, Terry and Anzt, Hartwig} } @conference {, title = {Pushing the Boundaries of Small Tasks: Scalable Low-Overhead Data-Flow Programming in TTG}, booktitle = {2022 IEEE International Conference on Cluster Computing (CLUSTER)}, year = {2022}, month = {2022-09}, publisher = {IEEE}, organization = {IEEE}, address = {Heidelberg, Germany}, abstract = {Shared memory parallel programming models strive to provide low-overhead execution environments. Task-based programming models, in particular, are well-suited to cope with the ubiquitous multi- and many-core systems since they allow applications to express all available concurrency to a scheduler, which is tasked with exploiting the available hardware resources. It is general consensus that atomic operations should be preferred over locks and mutexes to avoid inter-thread serialization and the resulting loss in efficiency. However, even atomic operations may serialize threads if not used judiciously. In this work, we will discuss several optimizations applied to TTG and the underlying PaRSEC runtime system aiming at removing contentious atomic operations to reduce the overhead of task management to a few hundred clock cycles. The result is an optimized data-flow programming system that seamlessly scales from a single node to distributed execution and which is able to compete with OpenMP in shared memory.}, keywords = {Dataflow graph, Hardware, Instruction sets, Memory management, PaR-SEC, parallel programming, runtime, scalability, Task analysis, task-based programming, Template Task Graph, TTG}, doi = {10.1109/CLUSTER51413.2022.00026}, url = {https://ieeexplore.ieee.org/document/9912704/}, author = {Schuchart, Joseph and Nookala, Poornima and Herault, Thomas and Valeev, Edward F. and George Bosilca} } @conference {, title = {A Python Library for Matrix Algebra on GPU and Multicore Architectures}, booktitle = {2022 IEEE 19th International Conference on Mobile Ad Hoc and Smart Systems (MASS)}, year = {2022}, month = {2022-12}, publisher = {IEEE}, organization = {IEEE}, address = {Denver, CO}, doi = {10.1109/MASS56207.2022.00121}, url = {https://ieeexplore.ieee.org/document/9973474/}, author = {Nance, Delario and Stanimire Tomov and Wong, Kwai} } @techreport {, title = {P1673R3: A Free Function Linear algebra Interface Based on the BLAS}, journal = {ISO JTC1 SC22 WG22}, number = {P1673R3}, year = {2021}, month = {2021-04}, publisher = {ISO}, type = {standard}, abstract = {We believe this proposal is complementary to P1385, a proposal for a C++ Standard linear algebra library that introduces matrix and vector classes and overloaded arithmetic operators. In fact, we think that our proposal would make a natural foundation for a library like what P1385 proposes. However, a free function interface -- which clearly separates algorithms from data structures -- more naturally allows for a richer set of operations such as what the BLAS provides. A natural extension of the present proposal would include accepting P1385{\textquoteright}s matrix and vector objects as input for the algorithms proposed here. A straightforward way to do that would be for P1385{\textquoteright}s matrix and vector objects to make views of their data available as basic_mdspan.}, keywords = {C++, linear algebra}, url = {http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2021/p1673r3.pdf}, author = {Mark Hoemmen and Daisy Hollman and Christian Trott and Daniel Sunderland and Nevin Liber and Li-Ta Lo and Damien Lebrun-Grandie and Graham Lopez and Peter Caday and Sarah Knepper and Piotr Luszczek and Timothy Costa} } @book {, title = {Parallel Processing and Applied Mathematics: 13th International Conference, PPAM 2019, Bialystok, Poland, September 8{\textendash}11, 2019, Revised Selected Papers, Part I}, series = { Lecture Notes in Computer Science}, number = {12043}, year = {2020}, month = {2020-03}, pages = {581}, publisher = {Springer International Publishing}, organization = {Springer International Publishing}, edition = {1}, isbn = {978-3-030-43229-4}, doi = {https://doi.org/10.1007/978-3-030-43229-4}, author = {Roman Wyrzykowski and Ewa Deelman and Jack Dongarra and Konrad Karczewski} } @book {, title = {Parallel Processing and Applied Mathematics: 13th International Conference, PPAM 2019, Bialystok, Poland, September 8{\textendash}11, 2019, Revised Selected Papers, Part II}, series = {Lecture Notes in Computer Science}, number = {12044}, year = {2020}, month = {2020-03}, pages = {503}, publisher = {Springer International Publishing}, organization = {Springer International Publishing}, isbn = {978-3-030-43222-5}, doi = {https://doi.org/10.1007/978-3-030-43222-5}, author = {Roman Wyrzykowski and Ewa Deelman and Jack Dongarra and Konrad Karczewski} } @article {, title = {Performance Application Programming Interface for Extreme-Scale Environments (PAPI-EX) (Poster)}, year = {2020}, month = {2020-20}, publisher = {2020 NSF Cyberinfrastructure for Sustained Scientific Innovation (CSSI) Principal Investigator Meeting}, address = {Seattle, WA}, author = {Jack Dongarra and Heike Jagode and Anthony Danalis and Daniel Barry and Vince Weaver} } @techreport {1454, title = {Performance Tuning SLATE}, journal = {SLATE Working Notes}, number = {14, ICL-UT-20-01}, year = {2020}, month = {2020-01}, publisher = {Innovative Computing Laboratory, University of Tennessee}, author = {Mark Gates and Ali Charara and Asim YarKhan and Dalal Sukkari and Mohammed Al Farhan and Jack Dongarra} } @article {, title = {The PLASMA Library on CORAL Systems and Beyond (Poster)}, year = {2020}, month = {2020-02}, publisher = {2020 Exascale Computing Project Annual Meeting}, address = {Houston, TX}, author = {Piotr Luszczek and Jack Dongarra} } @conference {, title = {Predicting MPI Collective Communication Performance Using Machine Learning}, booktitle = {2020 IEEE International Conference on Cluster Computing (CLUSTER)}, year = {2020}, month = {2020-09}, publisher = {IEEE}, organization = {IEEE}, address = {Kobe, Japan}, abstract = {The Message Passing Interface (MPI) defines the semantics of data communication operations, while the implementing libraries provide several parameterized algorithms for each operation. Each algorithm of an MPI collective operation may work best on a particular system and may be dependent on the specific communication problem. Internally, MPI libraries employ heuristics to select the best algorithm for a given communication problem when being called by an MPI application. The majority of MPI libraries allow users to override the default algorithm selection, enabling the tuning of this selection process. The problem then becomes how to select the best possible algorithm for a specific case automatically. In this paper, we address the algorithm selection problem for MPI collective communication operations. To solve this problem, we propose an auto-tuning framework for collective MPI operations based on machine-learning techniques. First, we execute a set of benchmarks of an MPI library and its entire set of collective algorithms. Second, for each algorithm, we fit a performance model by applying regression learners. Last, we use the regression models to predict the best possible (fastest) algorithm for an unseen communication problem. We evaluate our approach for different MPI libraries and several parallel machines. The experimental results show that our approach outperforms the standard algorithm selection heuristics, which are hard-coded into the MPI libraries, by a significant margin.}, keywords = {Auto-tuning, GAM, KNN, Machine Learning, message passing interface, Performance Prediction, XGBoost}, doi = {https://doi.org/10.1109/CLUSTER49012.2020.00036}, author = {Sascha Hunold and Abhinav Bhatele and George Bosilca and Peter Knees} } @article {1456, title = {Project-Based Research and Training in High Performance Data Sciences, Data Analytics, and Machine Learning}, journal = {The Journal of Computational Science Education}, volume = {11}, year = {2020}, month = {2020-01}, pages = {36-44}, doi = {https://doi.org/10.22369/issn.2153-4136/11/1/7}, url = {http://www.jocse.org/articles/11/1/7/}, author = {Wong, Kwai and Stanimire Tomov and Jack Dongarra} } @techreport {, title = {Prospectus for the Next LAPACK and ScaLAPACK Libraries: Basic ALgebra LIbraries for Sustainable Technology with Interdisciplinary Collaboration (BALLISTIC)}, journal = {LAPACK Working Notes}, number = {297, ICL-UT-20-07}, year = {2020}, month = {2020/07}, publisher = {University of Tennessee}, abstract = {The convergence of several unprecedented changes, including formidable new system design constraints and revolutionary levels of heterogeneity, has made it clear that much of the essential software infrastructure of computational science and engineering is, or will soon be, obsolete. Math libraries have historically been in the vanguard of software that must be adapted first to such changes, both because these low-level workhorses are so critical to the accuracy and performance of so many different types of applications, and because they have proved to be outstanding vehicles for finding and implementing solutions to the problems that novel architectures pose. Under the Basic ALgebra LIbraries for Sustainable Technology with Interdisciplinary Collaboration (BALLISTIC) project, the principal designers of the Linear Algebra PACKage (LAPACK) and the Scalable Linear Algebra PACKage (ScaLAPACK), the combination of which is abbreviated Sca/LAPACK, aim to enhance and update these libraries for the ongoing revolution in processor architecture, system design, and application requirements by incorporating them into a layered package of software components{\textemdash}the BALLISTIC ecosystem{\textemdash}that provides users seamless access to state-of-the-art solver implementations through familiar and improved Sca/LAPACK interfaces.}, author = {James Demmel and Jack Dongarra and Julie Langou and Julien Langou and Piotr Luszczek and Michael Mahoney} } @article {, title = {PULSE: PAPI Unifying Layer for Software-Defined Events (Poster)}, year = {2020}, month = {2020-02}, publisher = {2020 NSF Cyberinfrastructure for Sustained Scientific Innovation (CSSI) Principal Investigator Meeting}, address = {Seattle, WA}, author = {Heike Jagode and Anthony Danalis} } @article {1377, title = {PAPI Software-Defined Events for in-Depth Performance Analysis}, journal = {The International Journal of High Performance Computing Applications}, volume = {33}, year = {2019}, month = {2019-11}, pages = {1113-1127}, abstract = {The methodology and standardization layer provided by the Performance Application Programming Interface (PAPI) has played a vital role in application profiling for almost two decades. It has enabled sophisticated performance analysis tool designers and performance-conscious scientists to gain insights into their applications by simply instrumenting their code using a handful of PAPI functions that {\textquotedblleft}just work{\textquotedblright} across different hardware components. In the past, PAPI development had focused primarily on hardware-specific performance metrics. However, the rapidly increasing complexity of software infrastructure poses new measurement and analysis challenges for the developers of large-scale applications. In particular, acquiring information regarding the behavior of libraries and runtimes{\textemdash}used by scientific applications{\textemdash}requires low-level binary instrumentation, or APIs specific to each library and runtime. No uniform API for monitoring events that originate from inside the software stack has emerged. In this article, we present our efforts to extend PAPI{\textquoteright}s role so that it becomes the de facto standard for exposing performance-critical events, which we refer to as software-defined events (SDEs), from different software layers. Upgrading PAPI with SDEs enables monitoring of both types of performance events{\textemdash}hardware- and software-related events{\textemdash}in a uniform way, through the same consistent PAPI. The goal of this article is threefold. First, we motivate the need for SDEs and describe our design decisions regarding the functionality we offer through PAPI{\textquoteright}s new SDE interface. Second, we illustrate how SDEs can be utilized by different software packages, specifically, by showcasing their use in the numerical linear algebra library MAGMA-Sparse, the tensor algebra library TAMM that is part of the NWChem suite, and the compiler-based performance analysis tool Byfl. Third, we provide a performance analysis of the overhead that results from monitoring SDEs and discuss the trade-offs between overhead and functionality.}, url = {https://doi.org/10.1177/1094342019846287}, author = {Heike Jagode and Anthony Danalis and Hartwig Anzt and Jack Dongarra} } @article {1386, title = {PAPI{\textquoteright}s new Software-Defined Events for in-depth Performance Analysis}, year = {2019}, month = {2019-09}, publisher = {13th Parallel Tools Workshop}, address = {Dresden, Germany}, abstract = {One of the most recent developments of the Performance API (PAPI) is the addition of Software-Defined Events (SDE). PAPI has successfully served the role of the abstraction and unification layer for hardware performance counters for the past two decades. This talk presents our effort to extend this role to encompass performance critical information that does not originate in hardware, but rather in critical software layers, such as libraries and runtime systems. Our overall objective is to enable monitoring of both types of performance events, hardware- and software-related events, in a uniform way, through one consistent PAPI interface. Performance analysts will be able to form a complete picture of the entire application performance without learning new instrumentation primitives. In this talk, we outline PAPI{\textquoteright}s new SDE API and showcase the usefulness of SDE through its employment in software layers as diverse as the math library MAGMA, the dataflow runtime PaRSEC, and the state-of-the-art chemistry application NWChem. We outline the process of instrumenting these software packages and highlight the performance information that can be acquired with SDEs.}, author = {Anthony Danalis and Heike Jagode and Jack Dongarra} } @article {1437, title = {Parallel Selection on GPUs}, journal = {Parallel Computing}, volume = {91}, year = {2019}, month = {2020-03}, abstract = {We present a novel parallel selection algorithm for GPUs capable of handling single rank selection (single selection) and multiple rank selection (multiselection). The algorithm requires no assumptions on the input data distribution, and has a much lower recursion depth compared to many state-of-the-art algorithms. We implement the algorithm for different GPU generations, always leveraging the respectively-available low-level communication features, and assess the performance on server-line hardware. The computational complexity of our SampleSelect algorithm is comparable to specialized algorithms designed for {\textendash} and exploiting the characteristics of {\textendash} {\textquotedblleft}pleasant{\textquotedblright} data distributions. At the same time, as the proposed SampleSelect algorithm does not work on the actual element values but on the element ranks of the elements only, it is robust to the input data and can complete significantly faster for adversarial data distributions. We also address the use case of approximate selection by designing a variant that radically reduces the computational cost while preserving high approximation accuracy.}, keywords = {approximate selection, gpu, kth order statistics, multiselection, parallel selection algorithm}, doi = {https://doi.org/10.1016/j.parco.2019.102588}, url = {https://www.sciencedirect.com/science/article/pii/S0167819119301796}, author = {Tobias Ribizel and Hartwig Anzt} } @conference {1436, title = {ParILUT {\textendash} A Parallel Threshold ILU for GPUs}, booktitle = {IEEE International Parallel and Distributed Processing Symposium (IPDPS)}, year = {2019}, month = {2019-05}, publisher = {IEEE}, organization = {IEEE}, address = {Rio de Janeiro, Brazil}, abstract = {In this paper, we present the first algorithm for computing threshold ILU factorizations on GPU architectures. The proposed ParILUT-GPU algorithm is based on interleaving parallel fixed-point iterations that approximate the incomplete factors for an existing nonzero pattern with a strategy that dynamically adapts the nonzero pattern to the problem characteristics. This requires the efficient selection of thresholds that separate the values to be dropped from the incomplete factors, and we design a novel selection algorithm tailored towards GPUs. All components of the ParILUT-GPU algorithm make heavy use of the features available in the latest NVIDIA GPU generations, and outperform existing multithreaded CPU implementations.}, doi = {https://doi.org/10.1109/IPDPS.2019.00033}, author = {Hartwig Anzt and Tobias Ribizel and Goran Flegar and Edmond Chow and Jack Dongarra} } @conference {1452, title = {Performance Analysis of Tile Low-Rank Cholesky Factorization Using PaRSEC Instrumentation Tools}, booktitle = {Workshop on Programming and Performance Visualization Tools (ProTools 19) at SC19}, year = {2019}, month = {2019-11}, publisher = {ACM}, organization = {ACM}, address = {Denver, CO}, author = {Qinglei Cao and Yu Pei and Thomas Herault and Kadir Akbudak and Aleksandr Mikhalev and George Bosilca and Hatem Ltaief and David Keyes and Jack Dongarra} } @article {1311, title = {Performance of Asynchronous Optimized Schwarz with One-sided Communication}, journal = {Parallel Computing}, volume = {86}, year = {2019}, month = {2019-08}, pages = {66-81}, abstract = {In asynchronous iterative methods on distributed-memory computers, processes update their local solutions using data from other processes without an implicit or explicit global synchronization that corresponds to advancing the global iteration counter. In this work, we test the asynchronous optimized Schwarz domain-decomposition iterative method using various one-sided (remote direct memory access) communication schemes with passive target completion. The results show that when one-sided communication is well-supported, the asynchronous version of optimized Schwarz can outperform the synchronous version even for perfectly balanced partitionings of the problem on a supercomputer with uniform nodes.}, issn = {0167-8191}, doi = {https://doi.org/10.1016/j.parco.2019.05.004}, url = {http://www.sciencedirect.com/science/article/pii/S0167819118301261}, author = {Ichitaro Yamazaki and Edmond Chow and Aurelien Bouteiller and Jack Dongarra} } @article {1270, title = {PLASMA: Parallel Linear Algebra Software for Multicore Using OpenMP}, journal = {ACM Transactions on Mathematical Software}, volume = {45}, year = {2019}, month = {2019-06}, doi = {https://doi.org/10.1145/3264491}, author = {Jack Dongarra and Mark Gates and Azzam Haidar and Jakub Kurzak and Piotr Luszczek and Panruo Wu and Ichitaro Yamazaki and Asim YarKhan and Maksims Abalenkovs and Negin Bagherpour and Sven Hammarling and Jakub Sistek} } @conference {1376, title = {Progressive Optimization of Batched LU Factorization on GPUs}, booktitle = { IEEE High Performance Extreme Computing Conference (HPEC{\textquoteright}19)}, year = {2019}, month = {2019-09}, publisher = {IEEE}, organization = {IEEE}, address = {Waltham, MA}, author = {Ahmad Abdelfattah and Stanimire Tomov and Jack Dongarra} } @article {1393, title = {PAPI: Counting outside the Box}, year = {2018}, month = {2018-04}, publisher = {8th JLESC Meeting}, address = {Barcelona, Spain}, author = {Anthony Danalis and Heike Jagode and Jack Dongarra} } @article {1391, title = {PAPI{\textquoteright}s New Software-Defined Events for In-Depth Performance Analysis}, year = {2018}, month = {2018-09}, publisher = {CCDSC 2018: Workshop on Clusters, Clouds, and Data for Scientific Computing}, address = {Lyon, France}, abstract = {One of the most recent developments of the Performance API (PAPI) is the addition of Software-Defined Events (SDE). PAPI has successfully served the role of the abstraction and unification layer for hardware performance counters for over a decade. This talk presents our effort to extend this role to encompass performance critical information that does not originate in hardware, but rather in critical software layers, such as libraries and runtime systems. Our overall objective is to enable monitoring of both types of performance events, hardware- and software-related events, in a uniform way, through one consistent PAPI interface. Performance analysts will be able to form a complete picture of the entire application performance without learning new instrumentation primitives. In this talk, we outline PAPI{\textquoteright}s new SDE API and showcase the usefulness of SDE through its employment in software layers as diverse as the math library MAGMA, the dataflow runtime PaRSEC, and the state-of-the-art chemistry application NWChem. We outline the process of instrumenting these software packages and highlight the performance information that can be acquired with SDEs.}, author = {Heike Jagode and Anthony Danalis and Jack Dongarra} } @techreport {1191, title = {Parallel BLAS Performance Report}, journal = {SLATE Working Notes}, number = {05, ICL-UT-18-01}, year = {2018}, month = {2018-04}, publisher = {University of Tennessee}, author = {Jakub Kurzak and Mark Gates and Asim YarKhan and Ichitaro Yamazaki and Panruo Wu and Piotr Luszczek and Jamie Finney and Jack Dongarra} } @techreport {1206, title = {Parallel Norms Performance Report}, journal = {SLATE Working Notes}, number = {06, ICL-UT-18-06}, year = {2018}, month = {2018-06}, publisher = {Innovative Computing Laboratory, University of Tennessee}, author = {Jakub Kurzak and Mark Gates and Asim YarKhan and Ichitaro Yamazaki and Piotr Luszczek and Jamie Finney and Jack Dongarra} } @article {1190, title = {ParILUT - A New Parallel Threshold ILU}, journal = {SIAM Journal on Scientific Computing}, volume = {40}, year = {2018}, month = {2018-07}, pages = {C503{\textendash}C519}, publisher = {SIAM}, abstract = {We propose a parallel algorithm for computing a threshold incomplete LU (ILU) factorization. The main idea is to interleave a parallel fixed-point iteration that approximates an incomplete factorization for a given sparsity pattern with a procedure that adjusts the pattern. We describe and test a strategy for identifying nonzeros to be added and nonzeros to be removed from the sparsity pattern. The resulting pattern may be different and more effective than that of existing threshold ILU algorithms. Also in contrast to other parallel threshold ILU algorithms, much of the new algorithm has fine-grained parallelism.}, doi = {https://doi.org/10.1137/16M1079506}, author = {Hartwig Anzt and Edmond Chow and Jack Dongarra} } @conference {1216, title = {A Performance Model to Execute Workflows on High-Bandwidth Memory Architectures}, booktitle = {The 47th International Conference on Parallel Processing (ICPP 2018)}, year = {2018}, month = {2018-08}, publisher = {IEEE Computer Society Press}, organization = {IEEE Computer Society Press}, address = {Eugene, OR}, abstract = {This work presents a realistic performance model to execute scientific workflows on high-bandwidth memory architectures such as the Intel Knights Landing. We provide a detailed analysis of the execution time on such platforms, taking into account transfers from both fast and slow memory and their overlap with computations. We discuss several scheduling and mapping strategies: not only tasks must be assigned to computing resource, but also one has to decide which fraction of input and output data will reside in fast memory, and which will have to stay in slow memory. Extensive simulations allow us to assess the impact of the mapping strategies on performance. We also conduct actual experiments for a simple 1D Gauss-Seidel kernel, which assess the accuracy of the model and further demonstrate the importance of a tuned memory management. Altogether, our model and results lay the foundations for further studies and experiments on dual-memory systems.}, author = {Anne Benoit and Swann Perarnau and Lo{\"\i}c Pottier and Yves Robert} } @article {1227, title = {PMIx: Process Management for Exascale Environments}, journal = {Parallel Computing}, volume = {79}, year = {2018}, month = {2018-01}, pages = {9{\textendash}29}, issn = {01678191}, doi = {10.1016/j.parco.2018.08.002}, url = {https://linkinghub.elsevier.com/retrieve/pii/S0167819118302424https://api.elsevier.com/content/article/PII:S0167819118302424?httpAccept=text/xmlhttps://api.elsevier.com/content/article/PII:S0167819118302424?httpAccept=text/plain}, author = {Ralph Castain and Joshua Hursey and Aurelien Bouteiller and David Solt} } @article {1192, title = {Production Implementations of Pipelined \& Communication-Avoiding Iterative Linear Solvers}, year = {2018}, month = {2018-03}, publisher = {SIAM Conference on Parallel Processing for Scientific Computing}, address = {Tokyo, Japan}, author = {Mark Hoemmen and Ichitaro Yamazaki} } @inbook {1384, title = {Performance Analysis and Debugging Tools at Scale}, booktitle = {Exascale Scientific Applications: Scalability and Performance Portability}, year = {2017}, month = {2017-11}, pages = {17-50}, publisher = {Chapman \& Hall / CRC Press}, organization = {Chapman \& Hall / CRC Press}, chapter = {2}, abstract = {This chapter explores present-day challenges and those likely to arise as new hardware and software technologies are introduced on the path to exascale. It covers some of the underlying hardware, software, and techniques that enable tools and debuggers. Performance tools and debuggers are critical components that enable computational scientists to fully exploit the computing power of While high-performance computing systems. Instrumentation is the insertion of code to perform measurement in a program. It is vital step in performance analysis, especially for parallel programs. The essence of a debugging tool is enabling observation, exploration, and control of program state, such that a developer can, for example, verify that what is currently occurring correlates to what is intended. The increased complexity and volume of performance and debugging data likely to be seen on exascale systems risks overwhelming tool users. Tools and debuggers may need to develop advanced techniques such as automated filtering and analysis to reduce the complexity seen by the user.}, isbn = {9781315277400}, doi = {https://doi.org/10.1201/b21930}, author = {Scott Parker and John Mellor-Crummey and Dong H. Ahn and Heike Jagode and Holger Brunst and Sameer Shende and Allen D. Malony and David DelSignore and Ronny Tschuter and Ralph Castain and Kevin Harms and Philip Carns and Ray Loy and Kalyan Kumaran} } @techreport {1173, title = {PLASMA 17 Performance Report}, journal = {Innovative Computing Laboratory Technical Report}, number = {ICL-UT-17-11}, year = {2017}, month = {2017-06}, publisher = {University of Tennessee}, abstract = {PLASMA (Parallel Linear Algebra for Multicore Architectures) is a dense linear algebra package at the forefront of multicore computing. PLASMA is designed to deliver the highest possible performance from a system with multiple sockets of multicore processors. PLASMA achieves this objective by combining state of the art solutions in parallel algorithms, scheduling, and software engineering. PLASMA currently offers a collection of routines for solving linear systems of equations and least square problems.}, author = {Maksims Abalenkovs and Negin Bagherpour and Jack Dongarra and Mark Gates and Azzam Haidar and Jakub Kurzak and Piotr Luszczek and Samuel Relton and Jakub Sistek and David Stevens and Panruo Wu and Ichitaro Yamazaki and Asim YarKhan and Mawussi Zounon} } @techreport {1172, title = {PLASMA 17.1 Functionality Report}, journal = {Innovative Computing Laboratory Technical Report}, number = {ICL-UT-17-10}, year = {2017}, month = {2017-06}, publisher = {University of Tennessee}, abstract = {PLASMA (Parallel Linear Algebra for Multicore Architectures) is a dense linear algebra package at the forefront of multicore computing. PLASMA is designed to deliver the highest possible performance from a system with multiple sockets of multicore processors. PLASMA achieves this objective by combining state of the art solutions in parallel algorithms, scheduling, and software engineering. PLASMA currently offers a collection of routines for solving linear systems of equations and least square problems.}, author = {Maksims Abalenkovs and Negin Bagherpour and Jack Dongarra and Mark Gates and Azzam Haidar and Jakub Kurzak and Piotr Luszczek and Samuel Relton and Jakub Sistek and David Stevens and Panruo Wu and Ichitaro Yamazaki and Asim YarKhan and Mawussi Zounon} } @inproceedings {1307, title = {PMIx: Process Management for Exascale Environments}, journal = {Proceedings of the 24th European MPI Users{\textquoteright} Group Meeting}, year = {2017}, pages = {14:1{\textendash}14:10}, publisher = {ACM}, address = {New York, NY, USA}, abstract = {High-Performance Computing (HPC) applications have historically executed in static resource allocations, using programming models that ran independently from the resident system management stack (SMS). Achieving exascale performance that is both cost-effective and fits within site-level environmental constraints will, however, require that the application and SMS collaboratively orchestrate the flow of work to optimize resource utilization and compensate for on-the-fly faults. The Process Management Interface - Exascale (PMIx) community is committed to establishing scalable workflow orchestration by defining an abstract set of interfaces by which not only applications and tools can interact with the resident SMS, but also the various SMS components can interact with each other. This paper presents a high-level overview of the goals and current state of the PMIx standard, and lays out a roadmap for future directions. }, isbn = {978-1-4503-4849-2}, doi = {10.1145/3127024.3127027}, url = {http://doi.acm.org/10.1145/3127024.3127027}, author = {Castain, Ralph H. and David Solt and Joshua Hursey and Aurelien Bouteiller} } @techreport {1171, title = {POMPEI: Programming with OpenMP4 for Exascale Investigations}, journal = {Innovative Computing Laboratory Technical Report}, number = {ICL-UT-17-09}, year = {2017}, month = {2017-12}, publisher = {University of Tennessee}, abstract = {The objective of the Programming with OpenMP4 for Exascale Investigations (POMPEI) project is to explore new task-based programming techniques together with data structure centric programming for scientific applications to harness the potential of extreme-scale systems. Tasking is a well established by now approach on such systems as it has been used successfully to handle their large-scale parallelism and heterogeneity, which are leading challenges on the way to exascale computing. The approach is to harness the latest features of OpenMP4.5 and OpenACC2.5 to design abstractions shared among tasks and mapped efficiently to data-structure driven programming paradigms. This technical report describes the approach, along with its reference implementation and results for dense linear algebra algorithms.}, author = {Jack Dongarra and Azzam Haidar and Oscar Hernandez and Stanimire Tomov and Manjunath Gorentla Venkata} } @conference {1134, title = {Power-aware Computing: Measurement, Control, and Performance Analysis for Intel Xeon Phi}, booktitle = {2017 IEEE High Performance Extreme Computing Conference (HPEC{\textquoteright}17), Best Paper Finalist}, year = {2017}, month = {2017-09}, publisher = {IEEE}, organization = {IEEE}, address = {Waltham, MA}, abstract = {The emergence of power efficiency as a primary constraint in processor and system designs poses new challenges concerning power and energy awareness for numerical libraries and scientific applications. Power consumption also plays a major role in the design of data centers in particular for peta- and exa- scale systems. Understanding and improving the energy efficiency of numerical simulation becomes very crucial. We present a detailed study and investigation toward control- ling power usage and exploring how different power caps affect the performance of numerical algorithms with different computa- tional intensities, and determine the impact and correlation with performance of scientific applications. Our analyses is performed using a set of representatives kernels, as well as many highly used scientific benchmarks. We quantify a number of power and performance measurements, and draw observations and conclusions that can be viewed as a roadmap toward achieving energy efficiency computing algorithms.}, doi = {https://doi.org/10.1109/HPEC.2017.8091085}, author = {Azzam Haidar and Heike Jagode and Asim YarKhan and Phil Vaccaro and Stanimire Tomov and Jack Dongarra} } @article {1338, title = {Power-Aware HPC on Intel Xeon Phi KNL Processors}, year = {2017}, month = {2017-06}, publisher = {ISC High Performance (ISC17), Intel Booth Presentation}, address = {Frankfurt, Germany}, author = {Azzam Haidar and Heike Jagode and Asim YarKhan and Phil Vaccaro and Stanimire Tomov and Jack Dongarra} } @article {1067, title = {Preconditioned Krylov Solvers on GPUs}, journal = {Parallel Computing}, year = {2017}, month = {2017-06}, abstract = {In this paper, we study the effect of enhancing GPU-accelerated Krylov solvers with preconditioners. We consider the BiCGSTAB, CGS, QMR, and IDR(s) Krylov solvers. For a large set of test matrices, we assess the impact of Jacobi and incomplete factorization preconditioning on the solvers{\textquoteright} numerical stability and time-to-solution performance. We also analyze how the use of a preconditioner impacts the choice of the fastest solver.}, keywords = {gpu, ILU, Jacobi, Krylov solvers, Preconditioning}, issn = {01678191}, doi = {10.1016/j.parco.2017.05.006}, url = {http://www.sciencedirect.com/science/article/pii/S0167819117300777}, author = {Hartwig Anzt and Mark Gates and Jack Dongarra and Moritz Kreutzer and Gerhard Wellein and Martin Kohler} } @conference {968, title = {Performance Analysis and Acceleration of Explicit Integration for Large Kinetic Networks using Batched GPU Computations}, booktitle = {2016 IEEE High Performance Extreme Computing Conference (HPEC {\textquoteleft}16)}, year = {2016}, month = {2016-09}, publisher = {IEEE}, organization = {IEEE}, address = {Waltham, MA}, abstract = {We demonstrate the systematic implementation of recently-developed fast explicit kinetic integration algorithms that solve efficiently N coupled ordinary differential equations (subject to initial conditions) on modern GPUs. We take representative test cases (Type Ia supernova explosions) and demonstrate two or more orders of magnitude increase in efficiency for solving such systems (of realistic thermonuclear networks coupled to fluid dynamics). This implies that important coupled, multiphysics problems in various scientific and technical disciplines that were intractable, or could be simulated only with highly schematic kinetic networks, are now computationally feasible. As examples of such applications we present the computational techniques developed for our ongoing deployment of these new methods on modern GPU accelerators. We show that similarly to many other scientific applications, ranging from national security to medical advances, the computation can be split into many independent computational tasks, each of relatively small-size. As the size of each individual task does not provide sufficient parallelism for the underlying hardware, especially for accelerators, these tasks must be computed concurrently as a single routine, that we call batched routine, in order to saturate the hardware with enough work.}, author = {Azzam Haidar and Benjamin Brock and Stanimire Tomov and Michael Guidry and Jay Jay Billings and Daniel Shyles and Jack Dongarra} } @mastersthesis {960, title = {Performance Analysis and Modeling of Task-Based Runtimes}, volume = {PhD}, year = {2016}, month = {2016-05}, school = {University of Tennessee}, address = {Knoxville}, abstract = {The shift toward multicore processors has transformed the software and hardware landscape in the last decade. As a result, software developers must adopt parallelism in order to efficiently make use of multicore CPUs. Task-based scheduling has emerged as one method to reduce the complexity of parallel computing. Although task-based scheduling has been around for many years, the inclusion of task dependencies in OpenMP 4.0 suggests the paradigm will be around for the foreseeable future. While task-based schedulers simplify the process of parallel software development, they can obfuscate the performance characteristics of the execution of an algorithm. Additionally, they can create a challenge for users to analyze the performance of their software and tune algorithmic parameters accordingly.

We will present the basic principles of task-based runtimes as well as two new tools developed to assist engineers developing these runtimes and users employing them to parallelize their workloads. The first is a tool allowing users to simulate the execution of their algorithm. The second is an extension to the common execution trace which includes information about task dependencies.}, author = {Blake Haugen} } @article {990, title = {On the performance and energy efficiency of sparse linear algebra on GPUs}, journal = {International Journal of High Performance Computing Applications}, year = {2016}, month = {2016-10}, abstract = {In this paper we unveil some performance and energy efficiency frontiers for sparse computations on GPU-based supercomputers. We compare the resource efficiency of different sparse matrix{\textendash}vector products (SpMV) taken from libraries such as cuSPARSE and MAGMA for GPU and Intel{\textquoteright}s MKL for multicore CPUs, and develop a GPU sparse matrix{\textendash}matrix product (SpMM) implementation that handles the simultaneous multiplication of a sparse matrix with a set of vectors in block-wise fashion. While a typical sparse computation such as the SpMV reaches only a fraction of the peak of current GPUs, we show that the SpMM succeeds in exceeding the memory-bound limitations of the SpMV. We integrate this kernel into a GPU-accelerated Locally Optimal Block Preconditioned Conjugate Gradient (LOBPCG) eigensolver. LOBPCG is chosen as a benchmark algorithm for this study as it combines an interesting mix of sparse and dense linear algebra operations that is typical for complex simulation applications, and allows for hardware-aware optimizations. In a detailed analysis we compare the performance and energy efficiency against a multi-threaded CPU counterpart. The reported performance and energy efficiency results are indicative of sparse computations on supercomputers.}, doi = {10.1177/1094342016672081}, url = {http://hpc.sagepub.com/content/early/2016/10/05/1094342016672081.abstract}, author = {Hartwig Anzt and Stanimire Tomov and Jack Dongarra} } @techreport {934, title = {Performance, Design, and Autotuning of Batched GEMM for GPUs}, journal = {University of Tennessee Computer Science Technical Report}, number = {UT-EECS-16-739}, year = {2016}, month = {2016-02}, publisher = {University of Tennessee}, abstract = {Abstract. The general matrix-matrix multiplication (GEMM) is the most important numerical kernel in dense linear algebra. It is the key component for obtaining high performance in most LAPACK routines. As batched computations on relatively small problems continue to gain interest in many scientific applications, there becomes a need to have a high performance GEMM kernel for a batch of small matrices. Such kernel should be well designed and tuned to handle small sizes, and to maintain high performance for realistic test cases found in the higher level LAPACK routines, and scientific computing applications in general. This paper presents a high performance batched GEMM kernel on Graphics Processing Units (GPUs). We address batched problems with both xed and variable sizes, and show that specialized GEMM designs and a comprehensive autotuning process are needed to handle problems of small sizes. For most performance test reported in this paper, the proposed kernels outperform state-of-the-art approaches using a K40c GPU.}, keywords = {Autotuning, Batched GEMM, GEMM, GPU computing, HPC}, author = {Ahmad Abdelfattah and Azzam Haidar and Stanimire Tomov and Jack Dongarra} } @inbook {997, title = {Performance, Design, and Autotuning of Batched GEMM for GPUs}, booktitle = {High Performance Computing: 31st International Conference, ISC High Performance 2016, Frankfurt, Germany, June 19-23, 2016, Proceedings}, number = {9697}, year = {2016}, pages = {21{\textendash}38}, publisher = {Springer International Publishing}, organization = {Springer International Publishing}, abstract = {The general matrix-matrix multiplication (GEMM) is the most important numerical kernel in dense linear algebra, and is the key component for obtaining high performance in most LAPACK routines. As batched computations on relatively small problems continue to gain interest in many scientific applications, a need arises for a high performance GEMM kernel for batches of small matrices. Such a kernel should be well designed and tuned to handle small sizes, and to maintain high performance for realistic test cases found in the higher level LAPACK routines, and scientific computing applications in general. This paper presents a high performance batched GEMM kernel on Graphics Processing Units (GPUs). We address batched problems with both fixed and variable sizes, and show that specialized GEMM designs and a comprehensive autotuning process are needed to handle problems of small sizes. For most performance tests reported in this paper, the proposed kernels outperform state-of-the-art approaches using a K40c GPU.}, isbn = {978-3-319-41321-1}, doi = {10.1007/978-3-319-41321-1_2}, url = {http://dx.doi.org/10.1007/978-3-319-41321-1_2}, author = {Ahmad Abdelfattah and Azzam Haidar and Stanimire Tomov and Jack Dongarra}, editor = {Julian M. Kunkel and Pavan Balaji and Jack Dongarra} } @conference {944, title = {Performance, Design, and Autotuning of Batched GEMM for GPUs}, booktitle = {The International Supercomputing Conference (ISC High Performance 2016)}, year = {2016}, month = {2016-06}, address = {Frankfurt, Germany}, abstract = {The general matrix-matrix multiplication (GEMM) is the most important numerical kernel in dense linear algebra, and is the key component for obtaining high performance in most LAPACK routines. As batched computations on relatively small problems continue to gain interest in many scientific applications, a need arises for a high performance GEMM kernel for batches of small matrices. Such a kernel should be well designed and tuned to handle small sizes, and to maintain high performance for realistic test cases found in the higher level LAPACK routines, and scientific computing applications in general. This paper presents a high performance batched GEMM kernel on Graphics Processing Units (GPUs). We address batched problems with both fixed and variable sizes, and show that specialized GEMM designs and a comprehensive autotuning process are needed to handle problems of small sizes. For most performance tests reported in this paper, the proposed kernels outperform state-of-the-art approaches using a K40c GPU.}, keywords = {Autotuning, Batched GEMM, GEMM, GPU computing, HPC}, author = {Ahmad Abdelfattah and Azzam Haidar and Stanimire Tomov and Jack Dongarra} } @article {985, title = {Performance optimization of Sparse Matrix-Vector Multiplication for multi-component PDE-based applications using GPUs}, journal = {Concurrency and Computation: Practice and Experience}, volume = {28}, year = {2016}, month = {2016-05}, pages = {3447 - 3465}, abstract = {Simulations of many multi-component PDE-based applications, such as petroleum reservoirs or reacting flows, are dominated by the solution, on each time step and within each Newton step, of large sparse linear systems. The standard solver is a preconditioned Krylov method. Along with application of the preconditioner, memory-bound Sparse Matrix-Vector Multiplication (SpMV) is the most time-consuming operation in such solvers. Multi-species models produce Jacobians with a dense block structure, where the block size can be as large as a few dozen. Failing to exploit this dense block structure vastly underutilizes hardware capable of delivering high performance on dense BLAS operations. This paper presents a GPU-accelerated SpMV kernel for block-sparse matrices. Dense matrix-vector multiplications within the sparse-block structure leverage optimization techniques from the KBLAS library, a high performance library for dense BLAS kernels. The design ideas of KBLAS can be applied to block-sparse matrices. Furthermore, a technique is proposed to balance the workload among thread blocks when there are large variations in the lengths of nonzero rows. Multi-GPU performance is highlighted. The proposed SpMV kernel outperforms existing state-of-the-art implementations using matrices with real structures from different applications.}, doi = {10.1002/cpe.v28.1210.1002/cpe.3874}, url = {http://onlinelibrary.wiley.com/doi/10.1002/cpe.3874/full}, author = {Ahmad Abdelfattah and Hatem Ltaeif and David Keyes and Jack Dongarra} } @conference {943, title = {Performance Tuning and Optimization Techniques of Fixed and Variable Size Batched Cholesky Factorization on GPUs}, booktitle = {International Conference on Computational Science (ICCS{\textquoteright}16)}, year = {2016}, month = {2016-06}, address = {San Diego, CA}, abstract = {

Solving a large number of relatively small linear systems has recently drawn more attention in the HPC community, due to the importance of such computational workloads in many scientific applications, including sparse multifrontal solvers. Modern hardware accelerators and their architecture require a set of optimization techniques that are very different from the ones used in solving one relatively large matrix. In order to impose concurrency on such throughput-oriented architectures, a common practice is to batch the solution of these matrices as one task offloaded to the underlying hardware, rather than solving them individually.

This paper presents a high performance batched Cholesky factorization on large sets of relatively small matrices using Graphics Processing Units (GPUs), and addresses both fixed and variable size batched problems. We investigate various algorithm designs and optimization techniques, and show that it is essential to combine kernel design with performance tuning in order to achieve the best possible performance. We compare our approaches against state-of-the-art CPU solutions as well as GPU-based solutions using existing libraries, and show that, on a K40c GPU for example, our kernels are more than 2 faster.

}, keywords = {batched computation, Cholesky Factorization, GPUs, Tuning}, author = {Ahmad Abdelfattah and Azzam Haidar and Stanimire Tomov and Jack Dongarra} } @article {986, title = {Porting the PLASMA Numerical Library to the OpenMP Standard}, journal = {International Journal of Parallel Programming}, year = {2016}, month = {2016-06}, abstract = {PLASMA is a numerical library intended as a successor to LAPACK for solving problems in dense linear algebra on multicore processors. PLASMA relies on the QUARK scheduler for efficient multithreading of algorithms expressed in a serial fashion. QUARK is a superscalar scheduler and implements automatic parallelization by tracking data dependencies and resolving data hazards at runtime. Recently, this type of scheduling has been incorporated in the OpenMP standard, which allows to transition PLASMA from the proprietary solution offered by QUARK to the standard solution offered by OpenMP. This article studies the feasibility of such transition.}, issn = {0885-7458}, doi = {10.1007/s10766-016-0441-6}, url = {http://link.springer.com/10.1007/s10766-016-0441-6http://link.springer.com/content/pdf/10.1007/s10766-016-0441-6http://link.springer.com/content/pdf/10.1007/s10766-016-0441-6.pdfhttp://link.springer.com/article/10.1007/s10766-016-0441-6/fulltext.html}, author = {Asim YarKhan and Jakub Kurzak and Piotr Luszczek and Jack Dongarra} } @inproceedings {980, title = {Power Management and Event Verification in PAPI}, journal = {Tools for High Performance Computing 2015: Proceedings of the 9th International Workshop on Parallel Tools for High Performance Computing, September 2015, Dresden, Germany}, year = {2016}, pages = {pp. 41-51}, publisher = {Springer International Publishing}, address = {Dresden, Germany}, abstract = {For more than a decade, the PAPI performance monitoring library has helped to implement the familiar maxim attributed to Lord Kelvin: {\textquotedblleft}If you cannot measure it, you cannot improve it.{\textquotedblright} Widely deployed and widely used, PAPI provides a generic, portable interface for the hardware performance counters available on all modern CPUs and some other components of interest that are scattered across the chip and system. Recent and radical changes in processor and system design{\textemdash}systems that combine multicore CPUs and accelerators, shared and distributed memory, PCI- express and other interconnects{\textemdash}as well as the emergence of power efficiency as a primary design constraint, and reduced data movement as a primary programming goal, pose new challenges and bring new opportunities to PAPI. We discuss new developments of PAPI that allow for multiple sources of performance data to be measured simultaneously via a common software interface. Specifically, a new PAPI component that controls power is discussed. We explore the challenges of shared hardware counters that include system-wide measurements in existing multicore architectures. We conclude with an exploration of future directions for the PAPI interface. }, isbn = {978-3-319-39589-0}, doi = {https://doi.org/10.1007/978-3-319-39589-0_4}, author = {Heike Jagode and Asim YarKhan and Anthony Danalis and Jack Dongarra} } @article {936, title = {Parallel Programming Models for Dense Linear Algebra on Heterogeneous Systems}, journal = {Supercomputing Frontiers and Innovations}, volume = {2}, number = {4}, year = {2015}, month = {2015-10}, abstract = {We present a review of the current best practices in parallel programming models for dense linear algebra (DLA) on heterogeneous architectures. We consider multicore CPUs, stand alone manycore coprocessors, GPUs, and combinations of these. Of interest is the evolution of the programming models for DLA libraries {\textendash} in particular, the evolution from the popular LAPACK and ScaLAPACK libraries to their modernized counterparts PLASMA (for multicore CPUs) and MAGMA (for heterogeneous architectures), as well as other programming models and libraries. Besides providing insights into the programming techniques of the libraries considered, we outline our view of the current strengths and weaknesses of their programming models {\textendash} especially in regards to hardware trends and ease of programming high-performance numerical software that current applications need {\textendash} in order to motivate work and future directions for the next generation of parallel programming models for high-performance linear algebra libraries on heterogeneous systems.}, keywords = {dense linear algebra, gpu, HPC, Multicore, plasma, Programming models, runtime}, doi = {10.14529/jsfi1504}, author = {Maksims Abalenkovs and Ahmad Abdelfattah and Jack Dongarra and Mark Gates and Azzam Haidar and Jakub Kurzak and Piotr Luszczek and Stanimire Tomov and Ichitaro Yamazaki and Asim YarKhan} } @conference {915, title = {PaRSEC in Practice: Optimizing a Legacy Chemistry Application through Distributed Task-Based Execution}, booktitle = {2015 IEEE International Conference on Cluster Computing}, year = {2015}, month = {2015-09}, publisher = {IEEE}, organization = {IEEE}, address = {Chicago, IL}, abstract = {Task-based execution has been growing in popularity as a means to deliver a good balance between performance and portability in the post-petascale era. The Parallel Runtime Scheduling and Execution Control (PARSEC) framework is a task-based runtime system that we designed to achieve high performance computing at scale. PARSEC offers a programming paradigm that is different than what has been traditionally used to develop large scale parallel scientific applications. In this paper, we discuss the use of PARSEC to convert a part of the Coupled Cluster (CC) component of the Quantum Chemistry package NWCHEM into a task-based form. We explain how we organized the computation of the CC methods in individual tasks with explicitly defined data dependencies between them and re-integrated the modified code into NWCHEM. We present a thorough performance evaluation and demonstrate that the modified code outperforms the original by more than a factor of two. We also compare the performance of different variants of the modified code and explain the different behaviors that lead to the differences in performance.}, keywords = {dag, parsec, ptg, tasks}, author = {Anthony Danalis and Heike Jagode and George Bosilca and Jack Dongarra} } @conference {860, title = {Performance Analysis and Design of a Hessenberg Reduction using Stabilized Blocked Elementary Transformations for New Architectures}, booktitle = {The Spring Simulation Multi-Conference 2015 (SpringSim{\textquoteright}15), Best Paper Award}, year = {2015}, month = {2015-04}, address = {Alexandria, VA}, abstract = {The solution of nonsymmetric eigenvalue problems, Ax = λx, can be accelerated substantially by first reducing A to an upper Hessenberg matrix H that has the same eigenvalues as A. This can be done using Householder orthogonal transformations, which is a well established standard, or stabilized elementary transformations. The latter approach, although having half the flops of the former, has been used less in practice, e.g., on computer architectures with well developed hierarchical memories, because of its memory-bound operations and the complexity in stabilizing it. In this paper we revisit the stabilized elementary transformations approach in the context of new architectures {\textendash} both multicore CPUs and Xeon Phi coprocessors. We derive for a first time a blocking version of the algorithm. The blocked version reduces the memory-bound operations and we analyze its performance. A performance model is developed that shows the limitations of both approaches. The competitiveness of using stabilized elementary transformations has been quantified, highlighting that it can be 20 to 30\% faster on current high-end multicore CPUs and Xeon Phi coprocessors.}, keywords = {Eigenvalues problem, Hessenberg reduction, Multi/Many-core, Stabilized Elementary Transformations}, author = {Khairul Kabir and Azzam Haidar and Stanimire Tomov and Jack Dongarra} } @conference {861, title = {Performance Analysis and Optimization of Two-Sided Factorization Algorithms for Heterogeneous Platform}, booktitle = {International Conference on Computational Science (ICCS 2015)}, year = {2015}, month = {2015-06}, address = {Reykjav{\'\i}k, Iceland}, author = {Khairul Kabir and Azzam Haidar and Stanimire Tomov and Jack Dongarra} } @conference {884, title = {Performance of Random Sampling for Computing Low-rank Approximations of a Dense Matrix on GPUs}, booktitle = {The International Conference for High Performance Computing, Networking, Storage and Analysis (SC15)}, year = {2015}, month = {2015-11}, publisher = {ACM}, organization = {ACM}, address = {Austin, TX}, author = {Theo Mary and Ichitaro Yamazaki and Jakub Kurzak and Piotr Luszczek and Stanimire Tomov and Jack Dongarra} } @conference {890, title = {Plan B: Interruption of Ongoing MPI Operations to Support Failure Recovery}, booktitle = {22nd European MPI Users{\textquoteright} Group Meeting}, year = {2015}, month = {2015-09}, publisher = {ACM}, organization = {ACM}, address = {Bordeaux, France}, abstract = {Advanced failure recovery strategies in HPC system benefit tremendously from in-place failure recovery, in which the MPI infrastructure can survive process crashes and resume communication services. In this paper we present the rationale behind the specification, and an effective implementation of the Revoke MPI operation. The purpose of the Revoke operation is the propagation of failure knowledge, and the interruption of ongoing, pending communication, under the control of the user. We explain that the Revoke operation can be implemented with a reliable broadcast over the scalable and failure resilient Binomial Graph (BMG) overlay network. Evaluation at scale, on a Cray XC30 supercomputer, demonstrates that the Revoke operation has a small latency, and does not introduce system noise outside of failure recovery periods.}, doi = {10.1145/2802658.2802668}, author = {Aurelien Bouteiller and George Bosilca and Jack Dongarra} } @conference {889, title = {Practical Scalable Consensus for Pseudo-Synchronous Distributed Systems}, booktitle = {The International Conference for High Performance Computing, Networking, Storage and Analysis (SC15)}, year = {2015}, month = {2015-11}, publisher = {ACM}, organization = {ACM}, address = {Austin, TX}, abstract = {The ability to consistently handle faults in a distributed environment requires, among a small set of basic routines, an agreement algorithm allowing surviving entities to reach a consensual decision between a bounded set of volatile resources. This paper presents an algorithm that implements an Early Returning Agreement (ERA) in pseudo-synchronous systems, which optimistically allows a process to resume its activity while guaranteeing strong progress. We prove the correctness of our ERA algorithm, and expose its logarithmic behavior, which is an extremely desirable property for any algorithm which targets future exascale platforms. We detail a practical implementation of this consensus algorithm in the context of an MPI library, and evaluate both its efficiency and scalability through a set of benchmarks and two fault tolerant scientific applications.}, author = {Thomas Herault and Aurelien Bouteiller and George Bosilca and Marc Gamell and Keita Teranishi and Manish Parashar and Jack Dongarra} } @techreport {872, title = {Practical Scalable Consensus for Pseudo-Synchronous Distributed Systems: Formal Proof}, journal = {Innovative Computing Laboratory Technical Report}, number = {ICL-UT-15-01}, year = {2015}, month = {2015-04}, author = {Thomas Herault and Aurelien Bouteiller and George Bosilca and Marc Gamell and Keita Teranishi and Manish Parashar and Jack Dongarra} } @techreport {707, title = {Performance Analysis of the MPAS-Ocean Code using HPCToolkit and MIAMI}, journal = {ICL Technical Report}, number = {ICL-UT-14-01}, year = {2014}, month = {2014-02}, publisher = {University of Tennessee}, keywords = {MIAMI}, author = {Gabriel Marin} } @conference {828, title = {Performance and Portability with OpenCL for Throughput-Oriented HPC Workloads Across Accelerators, Coprocessors, and Multicore Processors}, booktitle = {5th Workshop on Latest Advances in Scalable Algorithms for Large-Scale Systems (ScalA {\textquoteright}14)}, year = {2014}, month = {2014-11}, publisher = {IEEE}, organization = {IEEE}, address = {New Orleans, LA}, abstract = {Ever since accelerators and coprocessors became the mainstream hardware for throughput-oriented HPC workloads, various programming techniques have been proposed to increase productivity in terms of both the performance and ease-of-use. We evaluate these aspects of OpenCL on a number of hardware platforms for an important subset of dense linear algebra operations that are relevant to a wide range of scientific applications. Our findings indicate that OpenCL portability has improved since our previous publication and many new and surprising usage scenarios are possible that rival those available after decades of software development on the CPUs. The combined performance-portability metric, even though not promised by the OpenCL standard, reflects the need for tuning performance-critical operations during the porting process and we show how a large portion of the available efficiency is lost if the tuning is not done correctly.}, doi = {10.1109/ScalA.2014.8}, author = {Azzam Haidar and Chongxiao Cao and Ichitaro Yamazaki and Jack Dongarra and Mark Gates and Piotr Luszczek and Stanimire Tomov} } @article {814, title = {Performance and Reliability Trade-offs for the Double Checkpointing Algorithm}, journal = {International Journal of Networking and Computing}, volume = {4}, number = {1}, year = {2014}, month = {2014}, pages = {32-41}, chapter = {32}, abstract = {Fast checkpointing algorithms require distributed access to stable storage. This paper revisits the approach based upon double checkpointing, and compares the blocking algorithm of Zheng, Shi and Kal{\'e} [23], with the non-blocking algorithm of Ni, Meneses and Kal{\'e} [15] in terms of both performance and risk. We also extend the model proposedcan provide a better efficiency in [23, 15] to assess the impact of the overhead associated to non-blocking communications. In addition, we deal with arbitrary failure distributions (as opposed to uniform distributions in [23]). We then provide a new peer-to-peer checkpointing algorithm, called the triple checkpointing algorithm, that can work without additional memory, and achieves both higher efficiency and better risk handling than the double checkpointing algorithm. We provide performance and risk models for all the evaluated protocols, and compare them through comprehensive simulations.}, keywords = {communication contention, in-memory checkpoint, performance, resilience, risk}, issn = {2185-2847}, author = {Jack Dongarra and Thomas Herault and Yves Robert} } @techreport {830, title = {Performance of Various Computers Using Standard Linear Equations Software, (Linpack Benchmark Report)}, journal = {University of Tennessee Computer Science Technical Report}, number = {CS-89-85}, year = {2014}, month = {2014-06}, publisher = {University of Tennessee}, abstract = {This report compares the performance of different computer systems in solving dense systems of linear equations. The comparison involves approximately a hundred computers, ranging from the Earth Simulator to personal computers.}, author = {Jack Dongarra} } @conference {764, title = {Power Monitoring with PAPI for Extreme Scale Architectures and Dataflow-based Programming Models}, booktitle = {2014 IEEE International Conference on Cluster Computing}, number = {ICL-UT-14-04}, year = {2014}, month = {2014-09}, publisher = {IEEE}, organization = {IEEE}, address = {Madrid, Spain}, abstract = {For more than a decade, the PAPI performance-monitoring library has provided a clear, portable interface to the hardware performance counters available on all modern CPUs and other components of interest (e.g., GPUs, network, and I/O systems). Most major end-user tools that application developers use to analyze the performance of their applications rely on PAPI to gain access to these performance counters. One of the critical road-blockers on the way to larger, more complex high performance systems, has been widely identified as being the energy efficiency constraints. With modern extreme scale machines having hundreds of thousands of cores, the ability to reduce power consumption for each CPU at the software level becomes critically important, both for economic and environmental reasons. In order for PAPI to continue playing its well established role in HPC, it is pressing to provide valuable performance data that not only originates from within the processing cores but also delivers insight into the power consumption of the system as a whole. An extensive effort has been made to extend the Performance API to support power monitoring capabilities for various platforms. This paper provides detailed information about three components that allow power monitoring on the Intel Xeon Phi and Blue Gene/Q. Furthermore, we discuss the integration of PAPI in PARSEC {\textendash} a taskbased dataflow-driven execution engine {\textendash} enabling hardware performance counter and power monitoring at true task granularity.}, doi = {10.1109/CLUSTER.2014.6968672}, author = {Heike McCraw and James Ralph and Anthony Danalis and Jack Dongarra} } @conference {871, title = {PTG: An Abstraction for Unhindered Parallelism}, booktitle = {International Workshop on Domain-Specific Languages and High-Level Frameworks for High Performance Computing (WOLFHPC)}, year = {2014}, month = {2014-11}, publisher = {IEEE Press}, organization = {IEEE Press}, address = {New Orleans, LA}, abstract = {

Increased parallelism and use of heterogeneous computing resources is now an established trend in High Performance Computing (HPC), a trend that, looking forward to Exascale, seems bound to intensify. Despite the evolution of hardware over the past decade, the programming paradigm of choice was invariably derived from Coarse Grain Parallelism with explicit data movements. We argue that message passing has remained the de facto standard in HPC because, until now, the ever increasing challenges that application developers had to address to create efficient portable applications remained manageable for expert programmers.

Data-flow based programming is an alternative approach with significant potential. In this paper, we discuss the Parameterized Task Graph (PTG) abstraction and present the specialized input language that we use to specify PTGs in our data-flow task-based runtime system, PaRSEC. This language and the corresponding execution model are in contrast with the execution model of explicit message passing as well as the model of alternative task based runtime systems. The Parameterized Task Graph language decouples the expression of the parallelism in the algorithm from the control-flow ordering, load balance, and data distribution. Thus, programs are more adaptable and map more efficiently on challenging hardware, as well as maintain portability across diverse architectures. To support these claims, we discuss the different challenges of HPC programming and how PaRSEC can address them, and we demonstrate that in today{\textquoteright}s large scale supercomputers, PaRSEC can significantly outperform state-of-the-art MPI applications and libraries, a trend that will increase with future architectural evolution.

}, keywords = {dte, parsec, plasma}, author = {Anthony Danalis and George Bosilca and Aurelien Bouteiller and Thomas Herault and Jack Dongarra} } @techreport {827, title = {PULSAR Users{\textquoteright} Guide, Parallel Ultra-Light Systolic Array Runtime}, journal = {University of Tennessee EECS Technical Report}, number = {UT-EECS-14-733}, year = {2014}, month = {2014-11}, publisher = {University of Tennessee}, abstract = {PULSAR version 2.0, released in November 2014, is a complete programming platform for large-scale distributed memory systems with multicore processors and hardware accelerators. PULSAR provides a simple abstraction layer over multithreading, message passing, and multi-GPU, multi-stream programming. PULSAR offers a general-purpose programming model, suitable for a wide range of scientific and engineering applications. PULSAR was inspired by systolic arrays, popularized by Hsiang-Tsung Kung and Charles E. Leiserson.}, author = {Jack Dongarra and Jakub Kurzak and Piotr Luszczek and Ichitaro Yamazaki} } @article {1382, title = {PAPI 5: Measuring Power, Energy, and the Cloud}, year = {2013}, month = {2013-04}, publisher = {2013 IEEE International Symposium on Performance Analysis of Systems and Software}, address = {Austin, TX}, author = {Vincent Weaver and Dan Terpstra and Heike McCraw and Matt Johnson and Kiran Kasichayanula and James Ralph and John Nelson and Phil Mucci and Tushar Mohan and Shirley Moore} } @conference {705, title = {Parallel Reduction to Hessenberg Form with Algorithm-Based Fault Tolerance}, booktitle = {International Conference for High Performance Computing, Networking, Storage and Analysis, IEEE-SC 2013}, year = {2013}, month = {2013-11}, address = {Denver, CO}, abstract = {This paper studies the resilience of a two-sided factorization and presents a generic algorithm-based approach capable of making two-sided factorizations resilient. We establish the theoretical proof of the correctness and the numerical stability of the approach in the context of a Hessenberg Reduction (HR) and present the scalability and performance results of a practical implementation. Our method is a hybrid algorithm combining an Algorithm Based Fault Tolerance (ABFT) technique with diskless checkpointing to fully protect the data. We protect the trailing and the initial part of the matrix with checksums, and protect finished panels in the panel scope with diskless checkpoints. Compared with the original HR (the ScaLAPACK PDGEHRD routine) our fault-tolerant algorithm introduces very little overhead, and maintains the same level of scalability. We prove that the overhead shows a decreasing trend as the size of the matrix or the size of the process grid increases.}, author = {Yulu Jia and George Bosilca and Piotr Luszczek and Jack Dongarra} } @conference {763, title = {A Parallel Solver for Incompressible Fluid Flows}, booktitle = {International Conference on Computational Science (ICCS 2013)}, year = {2013}, month = {2013-06}, publisher = {Elsevier B.V.}, organization = {Elsevier B.V.}, address = {Barcelona, Spain}, abstract = {The Navier-Stokes equations describe a large class of fluid flows but are difficult to solve analytically because of their nonlin- earity. We present in this paper a parallel solver for the 3-D Navier-Stokes equations of incompressible unsteady flows with constant coefficients, discretized by the finite difference method. We apply the prediction-projection method which transforms the Navier-Stokes equations into three Helmholtz equations and one Poisson equation. For each Helmholtz system, we apply the Alternating Direction Implicit (ADI) method resulting in three tridiagonal systems. The Poisson equation is solved using partial diagonalization which transforms the Laplacian operator into a tridiagonal one. We describe an implementation based on MPI where the computations are performed on each subdomain and information is exchanged on the interfaces, and where the tridiagonal system solutions are accelerated using vectorization techniques. We present performance results on a current multicore system.}, keywords = {ADI, Navier-Stokes equations, Parallel computing, Partial diagonalization, Prediction-projection, SIMD}, doi = {DOI: 10.1016/j.procs.2013.05.207}, author = {Yushan Wang and Marc Baboulin and Jo{\"e}l Falcou and Yann Fraigneau and Olivier Le Ma{\^\i}tre} } @article {749, title = {PaRSEC: Exploiting Heterogeneity to Enhance Scalability}, journal = {IEEE Computing in Science and Engineering}, volume = {15}, year = {2013}, month = {2013-11}, pages = {36-45}, abstract = {New high-performance computing system designs with steeply escalating processor and core counts, burgeoning heterogeneity and accelerators, and increasingly unpredictable memory access times call for dramatically new programming paradigms. These new approaches must react and adapt quickly to unexpected contentions and delays, and they must provide the execution environment with sufficient intelligence and flexibility to rearrange the execution to improve resource utilization.}, doi = {10.1109/MCSE.2013.98}, author = {George Bosilca and Aurelien Bouteiller and Anthony Danalis and Mathieu Faverge and Thomas Herault and Jack Dongarra} } @techreport {751, title = {Performance of Various Computers Using Standard Linear Equations Software}, journal = {University of Tennessee Computer Science Technical Report}, number = {cs-89-85}, year = {2013}, month = {2013-02}, abstract = {This report compares the performance of different computer systems in solving dense systems of linear equations. The comparison involves approximately a hundred computers, ranging from the Earth Simulator to personal computers.}, author = {Jack Dongarra} } @conference {753, title = {Portable HPC Programming on Intel Many-Integrated-Core Hardware with MAGMA Port to Xeon Phi}, booktitle = {PPAM 2013}, year = {2013}, month = {2013-09}, address = {Warsaw, Poland}, abstract = {This paper presents the design and implementation of several fundamental dense linear algebra (DLA) algorithms for multicore with Intel Xeon Phi Coprocessors. In particular, we consider algorithms for solving linear systems. Further, we give an overview of the MAGMA MIC library, an open source, high performance library that incorporates the developments presented, and in general provides to heterogeneous architectures of multicore with coprocessors the DLA functionality of the popular LAPACK library. The LAPACK-compliance simplifies the use of the MAGMA MIC library in applications, while providing them with portably performant DLA. High performance is obtained through use of the high-performance BLAS, hardware-specific tuning, and a hybridization methodology where we split the algorithm into computational tasks of various granularities. Execution of those tasks is properly scheduled over the heterogeneous hardware components by minimizing data movements and mapping algorithmic requirements to the architectural strengths of the various heterogeneous hardware components. Our methodology and programming techniques are incorporated into the MAGMA MIC API, which abstracts the application developer from the specifics of the Xeon Phi architecture and is therefore applicable to algorithms beyond the scope of DLA.}, keywords = {magma, mic, xeon phi}, author = {Jack Dongarra and Mark Gates and Azzam Haidar and Yulu Jia and Khairul Kabir and Piotr Luszczek and Stanimire Tomov} } @article {693, title = {Post-failure recovery of MPI communication capability: Design and rationale}, journal = {International Journal of High Performance Computing Applications}, volume = {27}, year = {2013}, month = {2013-01}, pages = {244 - 254}, abstract = {As supercomputers are entering an era of massive parallelism where the frequency of faults is increasing, the MPI Standard remains distressingly vague on the consequence of failures on MPI communications. Advanced fault-tolerance techniques have the potential to prevent full-scale application restart and therefore lower the cost incurred for each failure, but they demand from MPI the capability to detect failures and resume communications afterward. In this paper, we present a set of extensions to MPI that allow communication capabilities to be restored, while maintaining the extreme level of performance to which MPI users have become accustomed. The motivation behind the design choices are weighted against alternatives, a task that requires simultaneously considering MPI from the viewpoint of both the user and the implementor. The usability of the interfaces for expressing advanced recovery techniques is then discussed, including the difficult issue of enabling separate software layers to coordinate their recovery. }, issn = {1094-3420}, doi = {10.1177/1094342013488238}, url = {http://hpc.sagepub.com/cgi/doi/10.1177/1094342013488238}, author = {Wesley Bland and Aurelien Bouteiller and Thomas Herault and George Bosilca and Jack Dongarra} } @article {icl:688, title = {PAPI-V: Performance Monitoring for Virtual Machines}, journal = {CloudTech-HPC 2012}, year = {2012}, month = {2012-09}, address = {Pittsburgh, PA}, abstract = {This paper describes extensions to the PAPI hardware counter library for virtual environments, called PAPI-V. The extensions support timing routines, I/O measurements, and processor counters. The PAPI-V extensions will allow application and tool developers to use a familiar interface to obtain relevant hardware performance monitoring information in virtual environments.}, keywords = {papi}, doi = {10.1109/ICPPW.2012.29}, author = {Matt Johnson and Heike McCraw and Shirley Moore and Phil Mucci and John Nelson and Dan Terpstra and Vincent M Weaver and Tushar Mohan} } @article {icl:727, title = {Parallel Processing and Applied Mathematics, 9th International Conference, PPAM 2011}, journal = {Lecture Notes in Computer Science}, volume = {7203}, year = {2012}, month = {2012-00}, address = {Torun, Poland}, editor = {Roman Wyrzykowski and Jack Dongarra and Konrad Karczewski and Jerzy Wasniewski} } @article {icl:696, title = {A Parallel Tiled Solver for Symmetric Indefinite Systems On Multicore Architectures}, journal = {IPDPS 2012}, year = {2012}, month = {2012-05}, address = {Shanghai, China}, author = {Marc Baboulin and Dulceneia Becker and Jack Dongarra} } @techreport {icl:682, title = {Performance Counter Monitoring for the Blue Gene/Q Architecture}, journal = {University of Tennessee Computer Science Technical Report}, number = {ICL-UT-12-01}, year = {2012}, month = {2012-00}, keywords = {papi}, author = {Heike McCraw} } @techreport {icl:714, title = {Performance evaluation of LU factorization through hardware counter measurements}, journal = {University of Tennessee Computer Science Technical Report}, number = {ut-cs-12-700}, year = {2012}, month = {2012-10}, author = {Simplice Donfack and Stanimire Tomov and Jack Dongarra} } @article {icl:686, title = {Power Aware Computing on GPUs}, journal = {SAAHPC {\textquoteright}12 (Best Paper Award)}, year = {2012}, month = {2012-07}, address = {Argonne, IL}, keywords = {magma}, author = {Kiran Kasichayanula and Dan Terpstra and Piotr Luszczek and Stanimire Tomov and Shirley Moore and Gregory D. Peterson} } @inproceedings {icl:710, title = {Power Profiling of Cholesky and QR Factorizations on Distributed Memory Systems}, journal = {Third International Conference on Energy-Aware High Performance Computing}, year = {2012}, month = {2012-09}, address = {Hamburg, Germany}, author = {George Bosilca and Jack Dongarra and Hatem Ltaeif} } @article {icl:718, title = {Preliminary Results of Autotuning GEMM Kernels for the NVIDIA Kepler Architecture}, journal = {LAWN 267}, year = {2012}, month = {2012-00}, author = {Jakub Kurzak and Piotr Luszczek and Stanimire Tomov and Jack Dongarra} } @inproceedings {icl:665, title = {Programming the LU Factorization for a Multicore System with Accelerators}, journal = {Proceedings of VECPAR{\textquoteright}12}, year = {2012}, month = {2012-04}, address = {Kobe, Japan}, keywords = {plasma, quark}, author = {Jakub Kurzak and Piotr Luszczek and Mathieu Faverge and Jack Dongarra} } @techreport {icl:667, title = {A Proposal for User-Level Failure Mitigation in the MPI-3 Standard}, journal = {University of Tennessee Electrical Engineering and Computer Science Technical Report}, number = {ut-cs-12-693}, year = {2012}, month = {2012-02}, publisher = {University of Tennessee}, keywords = {ftmpi}, author = {Wesley Bland and George Bosilca and Aurelien Bouteiller and Thomas Herault and Jack Dongarra} } @techreport {icl:715, title = {Providing GPU Capability to LU and QR within the ScaLAPACK Framework}, journal = {University of Tennessee Computer Science Technical Report (also LAWN 272)}, number = {UT-CS-12-699}, year = {2012}, month = {2012-09}, author = {Peng Du and Stanimire Tomov and Jack Dongarra} } @article {icl:606, title = {Parallel algebraic domain decomposition solver for the solution of augmented systems.}, journal = {Parallel, Distributed, Grid and Cloud Computing for Engineering, Ajaccio, Corsica, France, 12-15 April}, year = {2011}, month = {2011-00}, author = {Emmanuel Agullo and Luc Giraud and Amina Guermouche and Azzam Haidar and Jean Roman} } @conference {icl:633, title = {Parallel Performance Measurement of Heterogeneous Parallel Systems with GPUs}, booktitle = {International Conference on Parallel Processing (ICPP{\textquoteright}11)}, year = {2011}, month = {2011-09}, publisher = {ACM}, organization = {ACM}, address = {Taipei, Taiwan}, abstract = {The power of GPUs is giving rise to heterogeneous parallel computing, with new demands on programming environments, runtime systems, and tools to deliver high-performing applications. This paper studies the problems associated with performance measurement of heterogeneous machines with GPUs. A heterogeneous computation model and alternative host-GPU measurement approaches are discussed to set the stage for reporting new capabilities for heterogeneous parallel performance measurement in three leading HPC tools: PAPI, Vampir, and the TAU Performance System. Our work leverages the new CUPTI tool support in NVIDIA{\textquoteright}s CUDA device library. Heterogeneous benchmarks from the SHOC suite are used to demonstrate the measurement methods and tool support.}, keywords = {magma, mumi, papi}, isbn = {978-0-7695-4510-3}, doi = {10.1109/ICPP.2011.71}, author = {Allen D. Malony and Scott Biersdorff and Sameer Shende and Heike Jagode and Stanimire Tomov and Guido Juckeland and Robert Dietrich and Duncan Poole and Christopher Lamb} } @inproceedings {icl:657, title = {Parallel Reduction to Condensed Forms for Symmetric Eigenvalue Problems using Aggregated Fine-Grained and Memory-Aware Kernels}, journal = {Proceedings of 2011 International Conference for High Performance Computing, Networking, Storage and Analysis (SC11)}, year = {2011}, month = {2011-11}, address = {Seattle, WA}, keywords = {plasma, quark}, author = {Azzam Haidar and Hatem Ltaeif and Jack Dongarra} } @techreport {icl:627, title = {Parallel Reduction to Condensed Forms for Symmetric Eigenvalue Problems using Aggregated Fine-Grained and Memory-Aware Kernels}, journal = {University of Tennessee Computer Science Technical Report, UT-CS-11-677, (also Lawn254)}, year = {2011}, month = {2011-08}, author = {Azzam Haidar and Hatem Ltaeif and Jack Dongarra} } @techreport {icl:641, title = {A parallel tiled solver for dense symmetric indefinite systems on multicore architectures}, journal = {University of Tennessee Computer Science Technical Report}, number = {ICL-UT-11-07}, year = {2011}, month = {2011-10}, keywords = {plasma, quark}, author = {Marc Baboulin and Dulceneia Becker and Jack Dongarra} } @techreport {icl:644, title = {Performance of Various Computers Using Standard Linear Equations Software (Linpack Benchmark Report)}, journal = {University of Tennessee Computer Science Technical Report}, number = {CS-89-85}, year = {2011}, month = {2011-00}, author = {Jack Dongarra} } @article {icl:636, title = {Performance Portability of a GPU Enabled Factorization with the DAGuE Framework}, journal = {IEEE Cluster: workshop on Parallel Programming on Accelerator Clusters (PPAC)}, year = {2011}, month = {2011-06}, keywords = {dague, magma, parsec}, author = {George Bosilca and Aurelien Bouteiller and Thomas Herault and Pierre Lemariner and Narapat Ohm Saengpatsa and Stanimire Tomov and Jack Dongarra} } @article {1361, title = {Power-aware Computing on GPGPUs}, year = {2011}, month = {2011-09}, publisher = {Fall Creek Falls Conference, Poster}, address = {Gatlinburg, TN}, author = {Kiran Kasichayanula and Haihang You and Shirley Moore and Stanimire Tomov and Heike Jagode and Matt Johnson} } @inproceedings {icl:619, title = {Power-Aware Prediction Models of Hybrid (MPI/OpenMP) Scientific Applications}, journal = {International Conference on Energy-Aware High Performance Computing (EnA-HPC 2011)}, year = {2011}, month = {2011-09}, address = {Hamburg, Germany}, keywords = {mumi}, author = {Charles Lively and Xingfu Wu and Valerie Taylor and Shirley Moore and Hung-Ching Chang and Chun-Yi Su and Kirk Cameron} } @inproceedings {icl:648, title = {Process Distance-aware Adaptive MPI Collective Communications}, journal = {IEEE Int{\textquoteright}l Conference on Cluster Computing (Cluster 2011)}, year = {2011}, month = {2011-00}, address = {Austin, Texas}, author = {Teng Ma and Thomas Herault and George Bosilca and Jack Dongarra} } @inproceedings {icl:621, title = {Profiling High Performance Dense Linear Algebra Algorithms on Multicore Architectures for Power and Energy Efficiency}, journal = {International Conference on Energy-Aware High Performance Computing (EnA-HPC 2011)}, year = {2011}, month = {2011-09}, address = {Hamburg, Germany}, keywords = {mumi}, author = {Hatem Ltaeif and Piotr Luszczek and Jack Dongarra} } @article {icl:569, title = {Parallel Band Two-Sided Matrix Bidiagonalization for Multicore Architectures}, journal = {IEEE Transactions on Parallel and Distributed Systems}, year = {2010}, month = {2010-04}, pages = {417-423}, author = {Hatem Ltaeif and Jakub Kurzak and Jack Dongarra} } @inproceedings {icl:584, title = {Performance Evaluation for Petascale Quantum Simulation Tools}, journal = {Proceedings of the Cray Users{\textquoteright} Group Meeting}, year = {2010}, month = {2010-05}, address = {Atlanta, GA}, author = {Stanimire Tomov and Wenchang Lu and and Jerzy Bernholc and Shirley Moore and Jack Dongarra} } @techreport {icl:575, title = {Performance of Various Computers Using Standard Linear Equations Software (Linpack Benchmark Report)}, journal = {University of Tennessee Computer Science Technical Report, UT-CS-89-85}, year = {2010}, month = {2010-00}, author = {Jack Dongarra} } @article {icl:579, title = {Proceedings of the International Conference on Computational Science}, journal = {ICCS 2010}, year = {2010}, month = {2010-05}, publisher = {Elsevier}, address = {Amsterdam}, editor = {Peter M. Sloot and Geert Dick van Albada and Jack Dongarra} } @article {icl:489, title = {Parallel Band Two-Sided Matrix Bidiagonalization for Multicore Architectures}, journal = {IEEE Transactions on Parallel and Distributed Systems (to appear)}, year = {2009}, month = {2009-05}, author = {Hatem Ltaeif and Jakub Kurzak and Jack Dongarra} } @article {icl:505, title = {Parallel Dense Linear Algebra Software in the Multicore Era}, journal = {in Cyberinfrastructure Technologies and Applications}, year = {2009}, month = {2009-00}, pages = {9-24}, publisher = {Nova Science Publishers, Inc.}, keywords = {plasma}, author = {Alfredo Buttari and Jack Dongarra and Jakub Kurzak and Julien Langou}, editor = {Junwei Cao} } @article {icl:502, title = {Parallel Programming in MATLAB}, journal = {The International Journal of High Performance Computing Applications}, volume = {23}, number = {3}, year = {2009}, month = {2009-07}, pages = {277-283}, keywords = {lfc, plasma}, author = {Piotr Luszczek} } @article {icl:500, title = {Paravirtualization Effect on Single- and Multi-threaded Memory-Intensive Linear Algebra Software}, journal = {Cluster Computing Journal: Special Issue on High Performance Distributed Computing}, volume = {12}, number = {2}, year = {2009}, month = {2009-00}, pages = {101-122}, publisher = {Springer Netherlands}, author = {Lamia Youseff and Keith Seymour and Haihang You and Dmitrii Zagorodnov and Jack Dongarra and Rich Wolski} } @inproceedings {icl:478, title = {Performance evaluation for petascale quantum simulation tools}, journal = {Proceedings of CUG09}, year = {2009}, month = {2009-05}, address = {Atlanta, GA}, keywords = {doe-nano}, author = {Stanimire Tomov and Wenchang Lu and Jerzy Bernholc and Shirley Moore and Jack Dongarra} } @article {icl:491, title = {The Problem with the Linpack Benchmark Matrix Generator}, journal = {International Journal of High Performance Computing Applications}, volume = {23}, number = {1}, year = {2009}, month = {2009-00}, pages = {5-14}, keywords = {hpl}, author = {Julien Langou and Jack Dongarra} } @techreport {icl:431, title = {Parallel Block Hessenberg Reduction using Algorithms-By-Tiles for Multicore Architectures Revisited}, journal = {University of Tennessee Computer Science Technical Report, UT-CS-08-624 (also LAPACK Working Note 208)}, year = {2008}, month = {2008-08}, keywords = {plasma}, author = {Hatem Ltaeif and Jakub Kurzak and Jack Dongarra} } @article {icl:446, title = {Parallel Tiled QR Factorization for Multicore Architectures}, journal = {Concurrency and Computation: Practice and Experience}, volume = {20}, year = {2008}, month = {2008-01}, pages = {1573-1590}, author = {Alfredo Buttari and Julien Langou and Jakub Kurzak and Jack Dongarra} } @article {icl:417, title = {Performance Instrumentation and Compiler Optimizations for MPI/OpenMP Applications}, journal = {Lecture Notes in Computer Science, OpenMP Shared Memory Parallel Programming}, volume = {4315}, year = {2008}, month = {2008-00}, publisher = {Springer Berlin / Heidelberg}, author = {Oscar Hernandez and Fengguang Song and Barbara Chapman and Jack Dongarra and Bernd Mohr and Shirley Moore and Felix Wolf} } @techreport {icl:441, title = {Performance of Various Computers Using Standard Linear Equations Software (Linpack Benchmark Report)}, journal = {University of Tennessee Computer Science Technical Report, CS-89-85}, year = {2008}, month = {2008-01}, author = {Jack Dongarra} } @article {icl:462, title = {PERI Auto-tuning}, journal = {Proc. SciDAC 2008}, volume = {125}, year = {2008}, month = {2008-01}, publisher = {Journal of Physics}, address = {Seatlle, Washington}, keywords = {gco}, author = {David Bailey and Jacqueline Chame and Chun Chen and Jack Dongarra and Mary Hall and Jeffrey K. Hollingsworth and Paul D. Hovland and Shirley Moore and Keith Seymour and Jaewook Shin and Ananta Tiwari and Sam Williams and Haihang You} } @article {icl:444, title = {The PlayStation 3 for High Performance Scientific Computing}, journal = {Computing in Science and Engineering}, year = {2008}, month = {2008-01}, pages = {80-83}, author = {Jakub Kurzak and Alfredo Buttari and Piotr Luszczek and Jack Dongarra} } @techreport {icl:406, title = {The PlayStation 3 for High Performance Scientific Computing}, journal = {University of Tennessee Computer Science Technical Report}, number = {UT-CS-08-608}, year = {2008}, month = {2008-01}, author = {Jakub Kurzak and Alfredo Buttari and Piotr Luszczek and Jack Dongarra} } @techreport {icl:423, title = {The Problem with the Linpack Benchmark Matrix Generator}, journal = {University of Tennessee Computer Science Technical Report, UT-CS-08-621 (also LAPACK Working Note 206)}, year = {2008}, month = {2008-06}, author = {Jack Dongarra and Julien Langou} } @techreport {icl:363, title = {Parallel Tiled QR Factorization for Multicore Architectures}, journal = {University of Tennessee Computer Science Dept. Technical Report, UT-CS-07-598 (also LAPACK Working Note 190)}, year = {2007}, month = {2007-00}, keywords = {plasma}, author = {Alfredo Buttari and Julien Langou and Jakub Kurzak and Jack Dongarra} } @article {icl:358, title = {Performance Analysis of MPI Collective Operations}, journal = {Cluster computing}, volume = {10}, number = {2}, year = {2007}, month = {2007-06}, pages = {127-143}, publisher = {Springer Netherlands}, keywords = {ftmpi}, author = {Jelena Pjesivac{\textendash}Grbovic and Thara Angskun and George Bosilca and Graham Fagg and Edgar Gabriel and Jack Dongarra} } @techreport {icl:381, title = {Performance of Various Computers Using Standard Linear Equations Software (Linpack Benchmark Report)}, journal = {University of Tennessee Computer Science Dept. Technical Report CS-89-85}, year = {2007}, month = {2007-00}, author = {Jack Dongarra} } @inproceedings {icl:325, title = {Performance evaluation of eigensolvers in nano-structure computations}, journal = {IEEE/ACM Proceedings of HPCNano SC06 (to appear)}, year = {2006}, month = {2006-01}, keywords = {doe-nano}, author = {Andrew Canning and Jack Dongarra and Julien Langou and Osni Marques and Stanimire Tomov and Christof Voemel and Lin-Wang Wang} } @inproceedings {icl:319, title = {Performance Instrumentation and Compiler Optimizations for MPI/OpenMP Applications}, journal = {Second International Workshop on OpenMP}, year = {2006}, month = {2006-01}, address = {Reims, France}, keywords = {kojak}, author = {Oscar Hernandez and Fengguang Song and Barbara Chapman and Jack Dongarra and Bernd Mohr and Shirley Moore and Felix Wolf} } @techreport {icl:328, title = {Performance of Various Computers Using Standard Linear Equations Software (Linpack Benchmark Report)}, journal = {University of Tennessee Computer Science Department Technical Report, UT-CS-04-526}, volume = {{\textendash}89-95}, year = {2006}, month = {2006-01}, author = {Jack Dongarra} } @article {icl:327, title = {Predicting the electronic properties of 3D, million-atom semiconductor nanostructure architectures}, journal = {J. Phys.: Conf. Ser. 46}, volume = {:101088/1742-6596/46/1/040}, year = {2006}, month = {2006-01}, pages = {292-298}, keywords = {DOE_NANO}, author = {Alex Zunger and Alberto Franceschetti and Gabriel Bester and Wesley B. Jones and Kwiseon Kim and Peter A. Graf and Lin-Wang Wang and Andrew Canning and Osni Marques and Christof Voemel and Jack Dongarra and Julien Langou and Stanimire Tomov} } @inproceedings {icl:310, title = {Proposal of MPI operation level Checkpoint/Rollback and one implementation}, journal = {Proceedings of IEEE CCGrid 2006}, year = {2006}, month = {2006-01}, publisher = {IEEE Computer Society}, keywords = {HARNESS/FT-PI}, author = {Yuan Tang and Graham Fagg and Jack Dongarra} } @article {icl:370, title = {Prospectus for the Next LAPACK and ScaLAPACK Libraries}, journal = {PARA 2006}, year = {2006}, month = {2006-06}, address = {Umea, Sweden}, author = {James Demmel and Jack Dongarra and B. Parlett and William Kahan and Ming Gu and David Bindel and Yozo Hida and Xiaoye Li and Osni Marques and Jason E. Riedy and Christof Voemel and Julien Langou and Piotr Luszczek and Jakub Kurzak and Alfredo Buttari and Julien Langou and Stanimire Tomov} } @article {icl:286, title = {On the Parallel Solution of Large Industrial Wave Propagation Problems}, journal = {Journal of Computational Acoustics (to appear)}, year = {2005}, month = {2005-01}, author = {Luc Giraud and Julien Langou and G. Sylvand} } @inproceedings {icl:274, title = {A Pattern-Based Approach to Automated Application Performance Analysis}, journal = {Workshop on Patterns in High Performance Computing}, year = {2005}, month = {2005-05}, address = {University of Illinois at Urbana-Champaign}, keywords = {kojak}, author = {Nikhil Bhatia and Shirley Moore and Felix Wolf and Jack Dongarra and Bernd Mohr} } @conference {icl:297, title = {PerfMiner: Cluster-Wide Collection, Storage and Presentation of Application Level Hardware Performance Data}, booktitle = {European Conference on Parallel Processing (Euro-Par 2005)}, year = {2005}, month = {2005-09}, publisher = {Springer}, organization = {Springer}, address = {Monte de Caparica, Portugal}, abstract = {We present PerfMiner, a system for the transparent collection, storage and presentation of thread-level hardware performance data across an entire cluster. Every sub-process/thread spawned by the user through the batch system is measured with near zero overhead and no dilation of run-time. Performance metrics are collected at the thread level using tool built on top of the Performance Application Programming Interface (PAPI). As the hardware counters are virtualized by the OS, the resulting counts are largely unaffected by other kernel or user processes. PerfMiner correlates this performance data with metadata from the batch system and places it in a database. Through a command line and web interface, the user can make queries to the database to report information on everything from overall workload characterization and system utilization to the performance of a single thread in a specific application. This is in contrast to other monitoring systems that report aggregate system-wide metrics sampled over a period of time. In this paper, we describe our implementation of PerfMiner as well as present some results from the test deployment of PerfMiner across three different clusters at the Center for Parallel Computers at The Royal Institute of Technology in Stockholm, Sweden.}, keywords = {papi}, doi = {https://doi.org/10.1007/11549468_1}, author = {Phil Mucci and Daniel Ahlin and Johan Danielsson and Per Ekman and Lars Malinowski} } @inproceedings {icl:287, title = {Performance Analysis of GYRO: A Tool Evaluation}, journal = {In Proceedings of the 2005 SciDAC Conference}, year = {2005}, month = {2005-06}, address = {San Francisco, CA}, keywords = {kojak}, author = {Patrick H. Worley and Jeff Candy and Laura Carrington and Kevin Huck and Timothy Kaiser and Kumar Mahinthakumar and Allen D. Malony and Shirley Moore and Dan Reed and Philip C. Roth and H. Shan and Sameer Shende and Allan Snavely and S. Sreepathi and Felix Wolf and Y. Zhang} } @inproceedings {icl:249, title = {Performance Analysis of MPI Collective Operations}, journal = {4th International Workshop on Performance Modeling, Evaluation, and Optmization of Parallel and Distributed Systems (PMEO-PDS {\textquoteright}05)}, year = {2005}, month = {2005-04}, address = {Denver, Colorado}, keywords = {ftmpi}, author = {Jelena Pjesivac{\textendash}Grbovic and Thara Angskun and George Bosilca and Graham Fagg and Edgar Gabriel and Jack Dongarra} } @article {icl:306, title = {Performance Analysis of MPI Collective Operations}, journal = {Cluster Computing Journal (to appear)}, year = {2005}, month = {2005-01}, keywords = {ftmpi}, author = {Jelena Pjesivac{\textendash}Grbovic and Thara Angskun and George Bosilca and Graham Fagg and Edgar Gabriel and Jack Dongarra} } @inproceedings {icl:295, title = {Performance Analysis of One-sided Communication Mechanisms}, journal = {Mini-Symposium "Tools Support for Parallel Programming", Proceedings of Parallel Computing (ParCo)}, number = {ICL-UT-06-07}, year = {2005}, month = {2005-09}, address = {Malaga, Spain}, keywords = {kojak}, author = {Bernd Mohr and Andrej K{\"u}hnal and Marc-Andre Hermanns and Felix Wolf} } @conference {icl:298, title = {Performance Profiling and Analysis of DoD Applications using PAPI and TAU}, booktitle = {Proceedings of DoD HPCMP UGC 2005}, year = {2005}, month = {2005-06}, publisher = {IEEE}, organization = {IEEE}, address = {Nashville, TN}, keywords = {papi}, author = {Shirley Moore and David Cronk and Felix Wolf and Avi Purkayastha and Patricia J. Teller and Robert Araiza and Gabriela Aguilera and Jamie Nava} } @inproceedings {icl:269, title = {Performance Profiling Overhead Compensation for MPI Programs}, journal = {In Proc. of the 12th European Parallel Virtual Machine and Message Passing Interface Conference}, year = {2005}, month = {2005-09}, publisher = {Springer LNCS}, keywords = {kojak}, author = {Sameer Shende and Allen D. Malony and Alan Morris and Felix Wolf} } @techreport {icl:199, title = {Performance of Various Computers Using Standard Linear Equations Software (Linpack Benchmark Report)}, journal = {University of Tennessee Computer Science Department Technical Report, CS-89-85}, year = {2004}, month = {2004-01}, author = {Jack Dongarra} } @techreport {icl:252, title = {Performance Optimization and Modeling of Blocked Sparse Kernels}, journal = {ICL Technical Report}, number = {ICL-UT-04-05}, year = {2004}, month = {2004-00}, keywords = {sans}, author = {Alfredo Buttari and Victor Eijkhout and Julien Langou and Salvatore Filippone} } @article {icl:240, title = {Process Fault-Tolerance: Semantics, Design and Applications for High Performance Computing}, journal = {International Journal for High Performance Applications and Supercomputing (to appear)}, year = {2004}, month = {2004-04}, keywords = {ftmpi, lacsi}, author = {Graham Fagg and Edgar Gabriel and Zizhong Chen and Thara Angskun and George Bosilca and Jelena Pjesivac{\textendash}Grbovic and Jack Dongarra} } @article {icl:205, title = {A Parallel Implementation of the Nonsymmetric QR Algorithm for Distributed Memory Architectures}, journal = {SIAM Journal on Scientific Computing}, volume = {24}, number = {1}, year = {2003}, month = {2003-01}, pages = {284-311}, author = {Greg Henry and David Watkins and Jack Dongarra} } @conference {icl:159, title = {Performance Instrumentation and Measurement for Terascale Systems}, booktitle = {ICCS 2003 Terascale Workshop}, year = {2003}, month = {2003-06}, publisher = {Springer, Berlin, Heidelberg}, organization = {Springer, Berlin, Heidelberg}, address = {Melbourne, Australia}, abstract = {As computer systems grow in size and complexity, tool support is needed to facilitate the efficient mapping of large-scale applications onto these systems. To help achieve this mapping, performance analysis tools must provide robust performance observation capabilities at all levels of the system, as well as map low-level behavior to high-level program constructs. Instrumentation and measurement strategies, developed over the last several years, must evolve together with performance analysis infrastructure to address the challenges of new scalable parallel systems.}, keywords = {papi}, doi = {https://doi.org/10.1007/3-540-44864-0_6}, author = {Jack Dongarra and Allen D. Malony and Shirley Moore and Phil Mucci and Sameer Shende} } @inproceedings {icl:126, title = {A Performance Oriented Migration Framework for the Grid}, journal = {Proceedings of the 3rd International Symposium on Cluster Computing and the Grid}, year = {2003}, month = {2003-05}, pages = {130-137}, address = {Tokyo, Japan}, keywords = {grads}, author = {Sathish Vadhiyar} } @techreport {icl:189, title = {A Proposed Standard for Matrix Metadata}, journal = {Innovative Computing Laboratory Technical Report}, number = {ICL-UT-03-02}, year = {2003}, month = {2003-11}, address = {Submitted to ACM TOMS}, keywords = {salsa, sans}, author = {Victor Eijkhout and Erika Fuentes} } @article {icl:114, title = {A Parallel Implementation of the Nonsymmetric QR Algorithm for Disitributed Memory Architectures}, journal = {SIAM Journal on Scientific Computing}, volume = {16}, number = {2}, year = {2002}, month = {2002-10}, pages = {284-311}, author = {Greg Henry and David Watkins and Jack Dongarra} } @article {icl:117, title = {Parallelizing the Divide and Conquer Algorithm for the Symmetric Tridiagonal Eigenvalue Problem on Distributed Memory Architectures}, journal = {SIAM Journal on Scientific Computing}, volume = {6}, number = {20}, year = {2002}, month = {2002-10}, pages = {2223-2236}, author = {Francoise Tisseur and Jack Dongarra} } @techreport {icl:84, title = {Polynomial Acceleration of Optimised Multi-grid Smoothers; Basic Theory}, journal = {ICL Technical Report}, volume = {156}, number = {ICL-UT-02-03}, year = {2002}, month = {2002-01}, author = {Victor Eijkhout} } @conference {icl:16, title = {The PAPI Cross-Platform Interface to Hardware Performance Counters}, booktitle = {Department of Defense Users{\textquoteright} Group Conference Proceedings}, year = {2001}, month = {2001-06}, address = {Biloxi, Mississippi}, abstract = {The purpose of the PAPI project is to specify a standard API for accessing hardware performance counters available on most modern microprocessors. These counters exist as a small set of registers that count \"events,\" which are occurrences of specific signals and states related to the processor{\textquoteright}s function. Monitoring these events facilitates correlation between the structure of source/object code and the efficiency of the mapping of that code to the underlying architecture. This correlation has a variety of uses in performance analysis and tuning. The PAPI project has developed a standard set of hardware events and a standard cross-platform library interface to the underlying counter hardware. The PAPI library has been implemented for a number of Shared Resource Center platforms. The PAPI project is developing end-user tools for dynamically selecting and displaying hardware counter performance data. PAPI support is also being incorporated into a number of third-party tools.}, keywords = {papi}, author = {Kevin London and Shirley Moore and Phil Mucci and Keith Seymour and Richard Luczak} } @inproceedings {icl:8, title = {Parallel I/O for EQM Applications}, journal = {Department of Defense Users{\textquoteright} Group Conference Proceedings (to appear),}, year = {2001}, month = {2001-06}, address = {Biloxi, Mississippi}, keywords = {ftmpi}, author = {David Cronk and Graham Fagg and Shirley Moore} } @article {icl:14, title = {Parallel IO Support for Meta-Computing Applications: MPI_Connect IO Applied to PACX-MPI}, journal = {8th European PVM/MPI User{\textquoteright}s Group Meeting, Lecture Notes in Computer Science}, volume = {2131}, year = {2001}, month = {2001-09}, publisher = {Springer Verlag, Berlin}, address = {Greece}, keywords = {ftmpi}, author = {Graham Fagg and Edgar Gabriel and Michael Resch} } @inproceedings {icl:78, title = {Performance Modeling for Self Adapting Collective Communications for MPI}, journal = {LACSI Symposium 2001}, year = {2001}, month = {2001-10}, address = {Santa Fe, NM}, keywords = {ftmpi}, author = {Sathish Vadhiyar and Graham Fagg and Jack Dongarra} } @techreport {icl:9, title = {Performance of Various Computers Using Standard Linear Equations Software (Linpack Benchmark Report)}, journal = {University of Tennessee Computer Science Technical Report}, number = {CS-89-85}, year = {2001}, month = {2001-01}, author = {Jack Dongarra} } @techreport {icl:36, title = {Performance of Various Computers Using Standard Linear Equations Software (Linpack Benchmark Report)}, journal = {University of Tennessee Computer Science Department Technical Report}, number = {CS-89-85}, year = {2000}, month = {2000-01}, author = {Jack Dongarra} } @techreport {icl:226, title = {A Portable Programming Interface for Performance Evaluation on Modern Processors}, journal = {University of Tennessee Computer Science Technical Report, UT-CS-00-444}, year = {2000}, month = {2000-07}, author = {Shirley Browne and Jack Dongarra and Nathan Garner and Kevin London and Phil Mucci} } @article {icl:31, title = {A Portable Programming Interface for Performance Evaluation on Modern Processors}, journal = {The International Journal of High Performance Computing Applications}, volume = {14}, number = {3}, year = {2000}, month = {2000-09}, pages = {189-204}, keywords = {papi}, doi = {https://doi.org/10.1177/109434200001400303}, author = {Shirley Browne and Jack Dongarra and Nathan Garner and George Ho and Phil Mucci} } @article {icl:227, title = {Providing Infrastructure and Interface to High Performance Applications in a Distributed Setting}, journal = {ASTC-HPC 2000}, year = {2000}, month = {2000-04}, address = {Washington, DC}, author = {Dorian Arnold and Wonsuck Lee and Jack Dongarra and Mary Wheeler} } @inproceedings {icl:59, title = {PAPI: A Portable Interface to Hardware Performance Counters}, journal = {Proceedings of Department of Defense HPCMP Users Group Conference}, year = {1999}, month = {1999-06}, keywords = {papi}, author = {Shirley Browne and Christine Deane and George Ho and Phil Mucci} } @article {icl:75, title = {Parallel and Distributed Scientific Computing: A Numerical Linear Algebra Problem Solving Environment Designer{\textquoteright}s Perspective}, journal = {Handbook on Parallel and Distributed Processing}, year = {1999}, month = {1999-01}, author = {Antoine Petitet and Henri Casanova and Jack Dongarra and Yves Robert and Clint Whaley} } @inproceedings {icl:54, title = {Portable Representation of Internet Content Channels in I2-DSI}, journal = {4th Intl. Web Caching Workshop}, year = {1999}, month = {1999-03}, address = {San Diego, CA}, author = {Micah Beck and Rajeev Chawla and Bert Dempsey and Terry Moore} }